R
Spartan-3 FPGA Family: DC and Switching Characteristics
Revision History
Date
04/11/03
07/11/03
02/06/04
Version No.
1.0
1.1
1.2
Initial Xilinx release.
Extended Absolute Maximum Rating for junction temperature in
Added numbers for
typical quiescent supply current (Table
7)
and DLL timing.
Revised V
IN
maximum rating (Table
Added power-on requirements (Table
3),
leakage
current number (Table
6),
and differential output voltage levels (Table
for Rev. 0. Published
new quiescent current numbers (Table
Updated pull-up and pull-down resistor strengths
6).
Added LVDCI_DV2 and LVPECL standards (Table
and
Changed
CCLK setup time (Table
and
Added timing numbers from v1.29 speed files as well as DCM timing (Table
through
Description
03/04/04
1.3
The Spartan-3 Family Data Sheet
DS099-1,
Spartan-3 FPGA Family:
(Module 1)
DS099-2,
Spartan-3 FPGA Family:
(Module 2)
DS099-3,
Spartan-3 FPGA Family: DC and Switching Characteristics
(Module 3)
DS099-4,
Spartan-3 FPGA Family:
Pinout Descriptions
(Module 4)
DS099-3 (v1.3) March 4, 2004
Advance Product Specification
40
1-800-255-7778
39
XILINX [ XILINX, INC ]
