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EVAL-ADuC7024QSZ 参数 Datasheet PDF下载

EVAL-ADuC7024QSZ图片预览
型号: EVAL-ADuC7024QSZ
PDF下载: 下载PDF文件 查看货源
内容描述: 精密模拟微控制器, 12位模拟I / O , ARM7TDMI MCU [Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU]
分类和应用: 微控制器
文件页数/大小: 104 页 / 1747 K
品牌: ADI [ ADI ]
 浏览型号EVAL-ADuC7024QSZ的Datasheet PDF文件第55页浏览型号EVAL-ADuC7024QSZ的Datasheet PDF文件第56页浏览型号EVAL-ADuC7024QSZ的Datasheet PDF文件第57页浏览型号EVAL-ADuC7024QSZ的Datasheet PDF文件第58页浏览型号EVAL-ADuC7024QSZ的Datasheet PDF文件第60页浏览型号EVAL-ADuC7024QSZ的Datasheet PDF文件第61页浏览型号EVAL-ADuC7024QSZ的Datasheet PDF文件第62页浏览型号EVAL-ADuC7024QSZ的Datasheet PDF文件第63页  
Data Sheet  
ADuC7019/20/21/22/24/25/26/27/28/29  
Example source code  
Example source code  
t2val_old= T2VAL;  
T2LD = 5;  
t2val_old= T2VAL;  
T2LD = 5;  
TCON = 0x480;  
TCON = 0x480;  
while ((T2VAL == t2val_old) || (T2VAL >  
3)) //ensures timer value loaded  
while ((T2VAL == t2val_old) || (T2VAL  
> 3)) //ensures timer value loaded  
IRQEN = 0x10;  
//enable T2 interrupt  
IRQEN = 0x10;  
//enable T2 interrupt  
PLLKEY1 = 0xAA;  
PLLCON = 0x01;  
PLLKEY2 = 0x55;  
PLLKEY1 = 0xAA;  
PLLCON = 0x03; //Select external clock  
PLLKEY2 = 0x55;  
POWKEY1 = 0x01;  
POWCON = 0x27;  
// Set Core into Nap mode  
POWKEY1 = 0x01;  
POWCON = 0x27;  
// Set Core into Nap mode  
POWKEY2 = 0xF4;  
POWKEY2 = 0xF4;  
In noisy environments, noise can couple to the external crystal  
pins, and PLL may lose lock momentarily. A PLL interrupt is  
provided in the interrupt controller. The core clock is immediately  
halted, and this interrupt is only serviced when the lock is restored.  
Power Control System  
A choice of operating modes is available on the ADuC7019/20/  
21/22/24/25/26/27/28/29. Table 57 describes what part is powered  
on in the different modes and indicates the power-up time.  
In case of crystal loss, the watchdog timer should be used. During  
initialization, a test on the RSTSTA register can determine if the  
reset came from the watchdog timer.  
Table 58 gives some typical values of the total current consump-  
tion (analog + digital supply currents) in the different modes,  
depending on the clock divider bits. The ADC is turned off. Note  
that these values also include current consumption of the  
regulator and other parts on the test board where these values  
are measured.  
External Clock Selection  
To switch to an external clock on P0.7, configure P0.7 in  
Mode 1. The external clock can be up to 44 MHz, providing  
the tolerance is 1%.  
Table 57. Operating Modes1  
Mode  
Active  
Pause  
Nap  
Sleep  
Stop  
Core  
Peripherals  
PLL  
X
X
XTAL/T2/T3  
IRQ0 to IRQ3  
Start-Up/Power-On Time  
130 ms at CD = 0  
24 ns at CD = 0; 3 µs at CD = 7  
24 ns at CD = 0; 3 µs at CD = 7  
1.58 ms  
X
X
X
X
X
X
X
X
X
X
X
X
X
1.7 ms  
1 X indicates that the part is powered on.  
Table 58. Typical Current Consumption at 25°C in Milliamperes  
PC[2:0]  
Mode  
Active  
Pause  
Nap  
CD = 0  
33.1  
22.7  
3.8  
CD = 1  
21.2  
13.3  
3.8  
CD = 2  
13.8  
8.5  
CD = 3  
10  
6.1  
CD = 4  
8.1  
4.9  
CD = 5  
7.2  
4.3  
CD = 6  
6.7  
4
CD = 7  
6.45  
3.85  
3.8  
000  
001  
010  
3.8  
3.8  
3.8  
3.8  
3.8  
011  
100  
Sleep  
Stop  
0.4  
0.4  
0.4  
0.4  
0.4  
0.4  
0.4  
0.4  
0.4  
0.4  
0.4  
0.4  
0.4  
0.4  
0.4  
0.4  
Rev. F | Page 59 of 104