ATF-551M4 Absolute Maximum Ratings
[1]
Symbol
V
DS
V
GS
V
GD
I
DS
I
GS
P
diss
P
in max.
T
CH
T
STG
θ
jc
Parameter
Drain-Source Voltage
[2]
Gate-Source Voltage
[2]
Gate Drain Voltage
[2]
Drain Current
[2]
Gate Current
[5]
Total Power Dissipation
[3]
RF Input Power
Channel Temperature
Storage Temperature
Thermal Resistance
[4]
Units
V
V
V
mA
mA
mW
dBm
°C
°C
°C/W
Absolute
Maximum
5
-5 to 1
-5 to 1
100
1
270
+10
150
-65 to 150
240
Notes:
1. Operation of this device above any one of
these parameters may cause permanent
damage.
2. Assumes DC quiescent conditions.
3. Source lead temperature is 25°C. Derate
6 mW/°C for T
L
> 40°C.
4. Thermal resistance measured using
150°C Liquid Crystal Measurement method.
5. Device can safely handle +10 dBm RF Input
Power provided I
GS
is limited to 1 mA. I
GS
at
P
1dB
drive RF level is bias circuit dependent.
See applications section for additional
information.
70
60
50
I
DS
(mA)
0.7V
40
30
20
10
0
0
1
2
3
4
V
DS
(V)
5
6
0.6V
0.5V
0.4V
0.3V
7
Figure 1. Typical I-V Curves.
(V
GS
= 0.1 V per step)
Product Consistency Distribution Charts
[6]
180
150
120
-3 Std
90
60
150
Cpk = 1.64
Stdev = 0.19
120
Cpk = 2.85
Stdev = 0.25
160
Cpk = 2.46
Stdev = 0.06
120
+3 Std
90
-3 Std
80
+3 Std
60
30
0
30
40
0
15
16
17
GAIN (dBm)
18
19
22
23
24
OIP3
25
26
0
0.29
0.49
0.69
NF
0.89
1.09
Figure 2. Capability Plot for Gain @ 2.7 V,
10 mA. LSL = 15.5, Nominal = 17.5,
USL = 18.5
Figure 3. Capability Plot for OIP3 @ 2.7 V,
10 mA. LSL = 22.0, Nominal = 24.1
Figure 4. Capability Plot for NF @ 2.7 V,
10 mA. Nominal = 0.5, USL = 0.9
Note:
6. Distribution data sample size is 398 samples taken from 4 different wafers. Future wafers allocated to this product may have nominal values anywhere
between the upper and lower limits. Measurements made on production test board. This circuit represents a trade-off between an optimal noise match
and a realizeable match based on production test equipment. Circuit losses have been de-embedded from actual measurements.
2
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
