Overview
The ATmega329/3290/649/6490 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architec-
ture. By executing powerful instructions in a single clock cycle, the ATmega329/3290/649/6490 achieves throughputs
approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
Block Diagram
Figure 3.
Block Diagram
GND
VCC
PF0 - PF7
PA0 - PA7
PC0 - PC7
PORTF DRIVERS
PORTA DRIVERS
PORTC DRIVERS
DATA REGISTER
PORTF
DATA DIR.
REG. PORTF
DATA REGISTER
PORTA
DATA DIR.
REG. PORTA
DATA REGISTER
PORTC
DATA DIR.
REG. PORTC
8-BIT DATA BUS
AVCC
AGND
AREF
ADC
CALIB. OSC
INTERNAL
OSCILLATOR
OSCILLATOR
JTAG TAP
PROGRAM
COUNTER
STACK
POINTER
WATCHDOG
TIMER
DATA DIR.
REG. PORTH
TIMING AND
CONTROL
LCD
CONTROLLER/
DRIVER
PORTH DRIVERS
ON-CHIP DEBUG
PROGRAM
FLASH
SRAM
MCU CONTROL
REGISTER
PH0 - PH7
DATA REGISTER
PORTH
BOUNDARY-
SCAN
INSTRUCTION
REGISTER
GENERAL
PURPOSE
REGISTERS
X
Y
Z
TIMER/
COUNTERS
PROGRAMMING
LOGIC
INSTRUCTION
DECODER
INTERRUPT
UNIT
XTAL1
XTAL2
DATA DIR.
REG. PORTJ
CONTROL
LINES
ALU
EEPROM
PORTJ DRIVERS
AVR CPU
STATUS
REGISTER
PJ0 - PJ6
DATA REGISTER
PORTJ
USART
UNIVERSAL
SERIAL INTERFACE
SPI
ANALOG
COMPARATOR
DATA REGISTER
PORTE
DATA DIR.
REG. PORTE
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
DATA REG.
PORTG
DATA DIR.
REG. PORTG
+
-
PORTE DRIVERS
PORTB DRIVERS
PORTD DRIVERS
PORTG DRIVERS
PE0 - PE7
PB0 - PB7
PD0 - PD7
PG0 - PG4
4
ATmega329/3290/649/6490
2552HS–AVR–11/06
RESET
ATMEL [ ATMEL CORPORATION ]
