ATmega329/3290/649/6490
The AVR core combines a rich instruction set with 32 general purpose working registers.
All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing
two independent registers to be accessed in one single instruction executed in one clock
cycle. The resulting architecture is more code efficient while achieving throughputs up to
ten times faster than conventional CISC microcontrollers.
The ATmega329/3290/649/6490 provides the following features: 32/64K bytes of In-
System Programmable Flash with Read-While-Write capabilities, 1/2K bytes EEPROM,
2/4K byte SRAM, 54/69 general purpose I/O lines, 32 general purpose working regis-
ters, a JTAG interface for Boundary-scan, On-chip Debugging support and
programming, a complete On-chip LCD controller with internal contrast control, three
flexible Timer/Counters with compare modes, internal and external interrupts, a serial
programmable USART, Universal Serial Interface with Start Condition Detector, an 8-
channel, 10-bit ADC, a programmable Watchdog Timer with internal Oscillator, an SPI
serial port, and five software selectable power saving modes. The Idle mode stops the
CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to con-
tinue functioning. The Power-down mode saves the register contents but freezes the
Oscillator, disabling all other chip functions until the next interrupt or hardware reset. In
Power-save mode, the asynchronous timer and the LCD controller continues to run,
allowing the user to maintain a timer base and operate the LCD display while the rest of
the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O mod-
ules except asynchronous timer, LCD controller and ADC, to minimize switching noise
during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running
while the rest of the device is sleeping. This allows very fast start-up combined with low-
power consumption.
The device is manufactured using Atmel’s high density non-volatile memory technology.
The On-chip In-System re-Programmable (ISP) Flash allows the program memory to be
reprogrammed In-System through an SPI serial interface, by a conventional non-volatile
memory programmer, or by an On-chip Boot program running on the AVR core. The
Boot program can use any interface to download the application program in the Applica-
tion Flash memory. Software in the Boot Flash section will continue to run while the
Application Flash section is updated, providing true Read-While-Write operation. By
combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic
chip, the Atmel ATmega329/3290/649/6490 is a powerful microcontroller that provides a
highly flexible and cost effective solution to many embedded control applications.
The ATmega329/3290/649/6490 AVR is supported with a full suite of program and sys-
tem development tools including: C Compilers, Macro Assemblers, Program
Debugger/Simulators, In-Circuit Emulators, and Evaluation kits.
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2552HS–AVR–11/06
ATMEL [ ATMEL CORPORATION ]
