3.0 Circuit Descriptions
RS8953B/8953SPB
3.2 PCM Channel
HDSL Channel Unit
3.2.1.4 Drop/Insert
Channel
PCM channels can carry timeslot data along a backplane that serves multiple
interfaces or subscriber line cards (see Figure 1-3) which requires that each
interface or line card be able to drop or insert individual PCM timeslots. The
RS8953B provides DROP and INSERT signals to facilitate external multiplexing
of individual timeslots from a shared PCM backplane, but does not provide the
capability to three-state its data outputs during specific PCM timeslots. DROP
and INSERT signals are programmed to mark RSER data output and INSDAT
data input timeslots via the receive Combination Table [COMBINE_TBL; addr
0xEE] and the transmit Routing Table [ROUTE_TBL; addr 0xED] assignments.
NOTE: Only INSDAT provides an alternate source for each PCM transmit timeslot
and does not expand the total number of available timeslots. Figure 3-7
shows DROP and INSERT timing as it relates to PCM bus timing during
T1/E1 applications.
Figure 3-7. Drop/Insert Channel Timing
Receive
RCLK
Transmit
TCLK
RMSYNC
RSER
TMSYNC
TSER
INSDAT
0
F
1
1
2
2
3
4
5
5
6
6
7
7
8
8
9
9
(E1_MODE = 1)
Timeslot 0
DROP
RSER
INSERT
}
TSER
3
4
INSDAT
Timeslot 0
(E1_MODE = 0)
DROP
INSERT
}
NOTE(S):
1. Falling-edge samples and rising-edge outputs shown per TCLK_SEL = 00 and RCLK_SEL = 00.
2. First entry of Transmit ROUTE_TBL [addr 0xED] shown programmed with INSERT_EN = 1.
3. First entry of Receive COMBINE_TBL [addr 0xEE] shown programmed with DROP_EN = 1.
4. For illustrative purposes only, Transmit and Receive are shown phase, frequency, and frame aligned.
3-8
Conexant
N8953BDSB
CONEXANT [ CONEXANT SYSTEMS, INC ]
