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CY62128BLL-70SI 参数 Datasheet PDF下载

CY62128BLL-70SI图片预览
型号: CY62128BLL-70SI
PDF下载: 下载PDF文件 查看货源
内容描述: 128K ×8静态RAM [128K x 8 Static RAM]
分类和应用:
文件页数/大小: 11 页 / 341 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY62128B
MoBL
Product Portfolio
Power Dissipation
V
CC
Range (V)
Product
CY62128BLL
Industrial
Industrial
Automotive
Min.
4.5
Typ.
[2]
5.0
Max.
5.5
Speed
(ns)
55
70
70
Operating, I
CC
(mA)
Typ.
[2]
7.5
6
6
Max.
20
15
25
Standby, I
SB2
(µA)
Typ.
[2]
2.5
2.5
2.5
Max.
15
15
25
Pin Configurations
Top View
SOIC
1
2
3
4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
I/O
0 13
I/O
1 14
I/O
2 15
GN
G
ND 16
g
gnc
G
NC
A16
A14
A12
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
A15
CE
2
WE
A13
A8
A9
A11
OE
A10
CE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
A
16
A
12
A
14
A
7
A
4
A
5
A
6
V
CC
NC
A
15
CE
2
WE
A
13
A
8
A
9
A
11
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Reverse TSOP I
Top View
(not to scale)
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
A
3
A
11
A
2
A
9
A
1
A
8
A
13
A
0
I/O
0
WE
I/O
1
CE
2
A
15
I/O
2
GND V
CC
NC
I/O
3
A
16
I/O
4
A
14
I/O
5
A
12
I/O
6
A
7
I/O
7
A
6
CE
1
A
5
A
10
A
4
OE
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
STSOP
Top View
(not to scale)
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
OE
A
10
CE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
GND
I/O
2
I/O
1
I/O
0
A
0
A
1
A
2
A
3
A
11
A
9
A
8
A
13
WE
CE
2
A
15
V
CC
NC
A
16
A
14
A
12
A
7
A
6
A
5
A
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
TSOP I
Top View
(not to scale)
32
31
30
29
28
27
26
25
25
24
23
22
21
20
19
18
17
OE
A
10
CE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
GND
I/O
2
I/O
1
I/O
0
A
0
A
1
A
2
A
3
Pin Definitions
Input
Input/Output
Input/Control
Input/Control
Input/Control
Input/Control
Ground
Power Supply
A
0
-A
16
. Address Inputs
I/O
0
-I/O
7
. Data lines. Used as input or output lines depending on operation
WE.
Write Enable, Active LOW. When selected LOW, a WRITE is conducted. When selected HIGH, a READ
is conducted.
CE
1
. Chip Enable 1, Active LOW.
CE
2
. Chip Enable 2, Active HIGH.
OE.
Output Enable, Active LOW. Controls the direction of the I/O pins. When LOW, the I/O pins behave as
outputs. When deasserted HIGH, I/O pins are three-stated, and act as input data pins
GND.
Ground for the device
V
CC
. Power supply for the device
Notes:
2. Typical values are included for reference only and are not tested or guaranteed. Typical values are an average of the distribution across normal production
variations as measured at V
CC
= 5.0V, T
A
= 25°C, and t
AA
= 70 ns.
Document #: 38-05300 Rev. *C
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