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MK10DN32VFT5 参数 Datasheet PDF下载

MK10DN32VFT5图片预览
型号: MK10DN32VFT5
PDF下载: 下载PDF文件 查看货源
内容描述: K10次家庭 [K10 Sub-Family]
分类和应用:
文件页数/大小: 59 页 / 1732 K
品牌: FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
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General
Table 10. General switching specifications (continued)
Symbol
Description
Port rise and fall time (low drive strength)
• Slew disabled
• 1.71 ≤ V
DD
≤ 2.7V
• 2.7 ≤ V
DD
≤ 3.6V
• Slew enabled
• 1.71 ≤ V
DD
≤ 2.7V
• 2.7 ≤ V
DD
≤ 3.6V
36
24
ns
ns
12
6
ns
ns
Min.
Max.
Unit
Notes
1. This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In Stop, VLPS, LLS, and VLLSx modes, the synchronizer is bypassed so shorter pulses can be
recognized in that case.
2. The greater synchronous and asynchronous timing must be met.
3. This is the minimum pulse width that is guaranteed to be recognized as a pin interrupt request in Stop, VLPS, LLS, and
VLLSx modes.
4. 75pF load
5. 15pF load
5.4 Thermal specifications
5.4.1 Thermal operating requirements
Table 11. Thermal operating requirements
Symbol
T
J
T
A
Description
Die junction temperature
Ambient temperature
Min.
–40
–40
Max.
125
105
Unit
°C
°C
5.4.2 Thermal attributes
Board type
Single-layer
(1s)
Symbol
R
θJA
Description
48 LQFP
48 QFN
81
Unit
°C/W
Notes
Thermal
70
resistance,
junction to
ambient (natural
convection)
Thermal
47
resistance,
junction to
ambient (natural
convection)
Four-layer
(2s2p)
R
θJA
28
°C/W
Table continues on the next page...
K10 Sub-Family Data Sheet, Rev. 4 5/2012.
Freescale Semiconductor, Inc.
21