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MPC8555PXAPF 参数 Datasheet PDF下载

MPC8555PXAPF图片预览
型号: MPC8555PXAPF
PDF下载: 下载PDF文件 查看货源
内容描述: PowerQUICC⑩ III集成通信处理器的硬件规格 [PowerQUICC⑩ III Integrated Communications Processor Hardware Specifications]
分类和应用: 外围集成电路通信时钟
文件页数/大小: 88 页 / 1242 K
品牌: FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
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Ethernet: Three-Speed, MII Management
8.2.4.2
TBI Receive AC Timing Specifications
Table 25. TBI Receive AC Timing Specifications
provides the TBI receive AC timing specifications.
At recommended operating conditions with LV
DD
of 3.3 V ± 5%.
Parameter/Condition
RX_CLK clock period
RX_CLK skew
RX_CLK duty cycle
RCG[9:0] setup time to rising RX_CLK
RCG[9:0] hold time to rising RX_CLK
RX_CLK clock rise time and fall time
Symbol
1
t
TRX
t
SKTRX
t
TRXH
/t
TRX
t
TRDVKH
t
TRDXKH
t
TRXR
, t
TRXF 2,3
Min
Typ
16.0
Max
Unit
ns
7.5
40
2.5
1.5
0.7
8.5
60
2.4
ns
%
ns
ns
ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t
(first two letters of functional block)(signal)(state)
(reference)(state)
for inputs and t
(first two letters of functional block)(reference)(state)(signal)(state)
for outputs. For example, t
TRDVKH
symbolizes TBI receive timing (TR) with respect to the time data input signals (D) reach the valid state (V) relative to the
t
TRX
clock reference (K) going to the high (H) state or setup time. Also, t
TRDXKH
symbolizes TBI receive timing (TR) with
respect to the time data input signals (D) went invalid (X) relative to the t
TRX
clock reference (K) going to the high (H) state.
Note that, in general, the clock reference symbol representation is based on three letters representing the clock of a
particular functional. For example, the subscript of t
TRX
represents the TBI (T) receive (RX) clock. For rise and fall times,
the latter convention is used with the appropriate letter: R (rise) or F (fall). For symbols representing skews, the subscript is
skew (SK) followed by the clock that is being skewed (TRX).
2. Guaranteed by design.
shows the TBI receive AC timing diagram.
t
TRX
RX_CLK1
t
TRXH
RXD[9:0]
t
TRDVKH
t
SKTRX
RX_CLK0
t
TRXH
t
TRDVKH
t
TRDXKH
t
TRDXKH
t
TRXF
Valid Data
Valid Data
t
TRXR
Figure 12. TBI Receive AC Timing Diagram
MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
29