MB89374
(Continued)
Pin No.
Symbol
I/O
Level*
Description
DIP
QFP
Write or read/write pin:
This pin serves as the WR# input pin in the MBL8086/88
mode. A LOW level is input to this pin when writing to the
registers in the DLC. This pin serves as the R/W# input pin
in the GMICRO mode. It determines the data direction when
accessing the registers in the DLC.
5
24
WR#/R/W#
I
—
Chip-select pin:
A LOW level is input to this pin when accessing the registers
in the DLC.
6
2
26
21
CS#
I
I
—
—
CPU-interface mode-setting pin:
This pin is set to the GMICRO mode when the input level is
LOW, and to the MBL8086/88 mode when the input level is
HIGH. The pin input level must be fixed to LOW or HIGH.
FORMAT#
33 to
36,
38 to 41
13 to
20
Data-bus (tristate) pins:
These pins are used to input and output 8-bit data.
D7 to D0
A4 to A0
I/O
I
Hi-Z
—
Address pins:
These pins are used to input addresses to select the
registers in the DLC.
7 to 11 27 to 31
Interrupt-request pin:
This pin is used to generate HIGH interrupt requests by
using bits other than the BRG2OUT bit of the BRG2 status
register (B2SR) as interrupt trigger bits.
35
37
10
12
IRQ
O
O
L
L
Interrupt-request pin:
This pin is used to generate HIGH interrupt requests by
using the BRG2OUT bit of the BRG2 status register (B2SR)
as the interrupt trigger bit.
IRQT
Receive DMA-request or port-output 3 pin:
The receive DMA-request pin or port-output pin is selected
by the RxD/I bit of the receive interrupt enable register
(RxIER). If this pin is used as the RxDRQ pin, it outputs a
HIGH level to request DMA transfer of receive data. If this
pin is used as the PO3 pin, it outputs a HIGH level when the
PO3 bit of the port register (PORTR) is 1, and a LOW level
when the PO3 bit is 0.
39
38
15
14
RXDRQ/PO3
O
O
L
L
Transmit DMA-request or port-output 2 pin:
The transmit DMA-request pin or port-output pin is selected
by the TxD/I bit of the transmit interrupt enable register
(TxIER). If this pin is used as the TxDRQ pin, it outputs a
HIGH level to request the DMA transfer of transmit data. If
this pin is used as the PO2 pin, it outputs a HIGH level when
the PO2 bit of the port register (PORTR) is 1, and a LOW
level when the PO2 bit is 0.
TXDRQ/PO2
Signals suffixed by the symbol # are negative logic.
* : Pin output level when reset
(Continued)
6
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