GS1559 Data Sheet
4.14 Device Power Up
The GS1559 has a recommended power supply sequence. To ensure correct
power up, power the CORE_VDD pins before the IO_VDD pins.
Device pins may also be driven prior to power up without causing damage.
To ensure that all internal registers are cleared upon power-up, the application
layer must hold the
RESET_TRST
signal LOW for a minimum of 1ms after the core
power supply has reached the minimum level specified in
See
4.15 Device Reset
In order to initialize all internal operating conditions to their default states the
application layer must hold the
RESET_TRST
signal LOW for a minimum of t
reset
=
1ms.
When held in reset, all device outputs will be driven to a high-impedance state.
+1.65V
+1.8V
CORE_VDD
t
reset
RESET_TRST
Reset
t
reset
Reset
Figure 4-16: Reset Pulse
30572 - 4
July 2005
68 of 74