STA308
3.0 CONFIGURATION REGISTER A (ADDRESS 00H)
BIT
NAME
RST
D7
MPC
1
D6
MPE
0
D5
BME
0
D4
IR1
0
D3
IR0
0
D2
MCS2
0
D1
MCS1
1
D0
MCS0
1
3.0.1 Master Clock Select
BIT
0
1
2
R/W
R/W
R/W
R/W
RST
1
1
0
NAME
MCS0
MCS1
MCS2
DESCRIPTION
Master Clock Select : Selects the ratio between the input I
2
S
sample frequency and the input clock.
The STA308 will support sample rates of 32kHz, 44.1kHz, 48Khz, 88.2kHz, 96kHz, 176.4kHz, and 192kHz.
Therefore the internal clock will be:
– 65.536Mhz for 32kHz
– 90.3168Mhz for 44.1khz, 88.2kHz, and 176.4kHz
– 98.304Mhz for 48kHz, 96kHz, and 192kHz
The external clock frequency provided to the XTI pin must be a multiple of the input sample frequency(fs). The
relationship between the input clock and the input sample rate is determined by both the MCSx and the IRx (In-
put Rate) register bits. The MCSx bits determine the PLL factor generating the internal clock and the IRx bits
determine the oversampling ratio used internally.
Input Sample Rate
fs
(kHz)
IR
1xx
32, 44.1, 48
88.2, 96
176.4, 192
00
01
10
128fs
64fs
64fs
011
256fs
128fs
128fs
MCS(2..0)
010
384fs
192fs
192fs
001
512fs
256fs
256fs
000
768fs
384fs
384fs
3.0.2 Interpolation Ratio Select
BIT
2
3
R/W
R/W
R/W
RST
0
0
NAME
IR0
IR1
DESCRIPTION
Interpolation Ratio Select : Selects internal interpolation ratio based on input I
2
S
sample frequency
The STA308 has variable interpolation (oversampling) settings such that internal processing and DDX output
rates remain consistent. The first processing block interpolates by either 4 times, 2 times, or 1 time (pass-
through). The IR bits determine the oversampling ratio of this interpolation.
Table 2. IR bit settings as a function of Input Sample Rate.
Input Sample Rate
Fs
32kHz
44.1kHz
48kHz
88.2kHz
96kHz
176.4kHz
192kHz
IR(1,0)
00
00
00
01
01
10
10
1
st
Stage Interpolation Ratio
4 times oversampling
4 times oversampling
4 times oversampling
2 times oversampling
2 times oversampling
Pass-Through
Pass-Through
11/33
STMICROELECTRONICS [ STMICROELECTRONICS ]
