bq3285LF
Register B
Register B Bits
5
4
3
2
AIE UIE
-
DF
UIE - Update Cycle Interrupt Enable
7
-
6
-
5
-
4
UIE
3
-
2
-
1
-
0
-
7
UTI
6
PIE
1
HF
0
DSE
Register B enables:
n
n
n
This bit enables an interrupt request due to an update
ended interrupt event:
1 = Enabled
0 = Disabled
The UIE bit is automatically cleared when the UTI bit
equals 1.
AIE - Alarm Interrupt Enable
7
-
6
-
5
AIE
4
-
3
-
2
-
1
-
0
-
Update cycle transfer operation
Interrupt events
Daylight saving adjustment
Register B selects:
n
Clock and calendar data formats
All bits of register B are read/write.
Bit 3 is unused.
DSE - Daylight Saving Enable
7
-
6
-
5
-
4
-
3
-
2
-
1
-
0
DSE
This bit enables an interrupt request due to an alarm
interrupt event:
1 = Enabled
0 = Disabled
PIE - Periodic Interrupt Enable
7
-
6
PIE
5
-
4
-
3
-
2
-
1
-
0
-
This bit enables daylight-saving time adjustments when
written to 1:
n
On the last Sunday in October, the first time the
bq3285LF increments past 1:59:59 AM, the time falls
back to 1:00:00 AM.
On the first Sunday in April, the time springs
forward from 2:00:00 AM to 3:00:00 AM.
n
This bit enables an interrupt request due to a periodic
interrupt event:
1 = Enabled
0 = Disabled
HF - Hour Format
7
-
6
-
5
-
4
-
3
-
2
-
1
HF
0
-
UTI - Update Transfer Inhibit
7
UTI
6
-
5
-
4
-
3
-
2
-
1
-
0
-
This bit selects the time-of-day and alarm hour format:
1 = 24-hour format
0 = 12-hour format
DF - Data Format
7
-
6
-
5
-
4
-
3
-
2
DF
1
-
0
-
This bit inhibits the transfer of RTC bytes to the user
buffer:
1 = Inhibits transfer and clears UIE
0 = Allows transfer
Register C
Register C Bits
5
4
3
AF
UF
0
This bit selects the numeric format in which the time,
alarm, and calendar bytes are represented:
1 = Binary
0 = BCD
7
INTF
6
PF
2
-
1
0
0
0
Register C is the read-only event status register.
9