TMS320C1x
DIGITAL SIGNAL PROCESSORS
SPRS009C – JANUARY 1987 – REVISED JULY 1991
Table 1 provides an overview of
′C1x
processors with comparisons of memory, I/O, cycle timing, military support,
and package types. For specific availability, contact the nearest TI Field Sales Office.
Table 1. TMS320C1x Device Overview
DEVICE
TMS320C10 (2)
TMS320C10-14
TMS320C10-25
TMS320C14 (3)
TMS320E14 (3)
TMS320P14†
TMS320C15 (3)
TMS320C15-25
TMS320E15 (3)
TMS320E15-25
TMS320LC15
TMS320P15†
TMS320C16
TMS320C17
TMS320E17 (5)
TMS320LC17 (5)
TMS320P17 (5)†
MEMORY
RAM
144
144
144
256
256
256
256
256
256
256
256
256
256
256
256
256
256
ROM
1.5K
1.5K
1.5K
4K
—
—
4K
4K
—
—
4K
—
8K
4K
—
4K
—
EPROM
—
—
—
—
4K
4K
—
—
4K
4K
—
4K
—
—
4K
—
4K
PROG.
4K
4K
4K
4K
4K
4K
4K
4K
4K
4K
4K
4K
64K
—
—
—
—
SERIAL
—
—
—
1
1
1
—
—
—
—
—
—
—
2
2
2
2
I/O
PARALLEL
8
×
16
8
×
16
8
×
16
7
×
16 (4)
7
×
16 (4)
7
×
16 (4)
8
×
16
8
×
16
8
×
16
8
×
16
8
×
16
8
×
16
8
×
16
6
×
16 (5)
6
×
16 (5)
6
×
16 (5)
6
×
16 (5)
CYCLE
(ns)
200
280
160
160
160
160
200
160
200
160
250
200
114
200
200
278
200
DIP
40
40
40
—
—
—
40
40
40
40
40
40
—
40
40
40
40
PACKAGE (1)
PLCC
44
44
44
68
—
68
44
44
—
—
44
44
—
44
—
44
44
CER-QUAD
—
—
—
—
68 CER
—
—
—
44 CER
44 CER
—
—
64 QFP
—
44 CER
—
† One-time programmable (OTP) device is in a windowless plastic package and cannot be erased.
NOTES: 1. DIP = dual in-line package. PLCC = plastic-leaded chip carrier. CER = ceramic-leaded chip carrier. QFP = plastic quad flat pack.
2. Military version available.
3. Military versions planned; contact nearest TI Field Sales Office for availability.
4. On-chip 16-bit I/O, four capture inputs, and six compare outputs are available.
5. On-chip 16-bit coprocessor interface is optional by pin selection.
2
POST OFFICE BOX 1443
•
HOUSTON, TEXAS 77001
TI [ TEXAS INSTRUMENTS ]
