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SLVS619A – NOVEMBER 2005 – REVISED FEBRUARY 2006
PACKAGE DISSIPATION RATINGS
(1) (2)
PACKAGE
24-Pin RHF with solder
(1)
(2)
THERMAL IMPEDANCE
JUNCTION-TO-AMBIENT
19.7°C/W
THERMAL IMPEDANCE
JUNCTION-TO-CASE
1.7°C/W
Maximum power dissipation may be limited by overcurrent protection.
Test board conditions:
•
3 inch x 3 inch, 4 layers, thickness: 0.062 inch
•
2 oz. copper traces located on the top of the PCB
•
2 oz. copper ground plane on the bottom of the PCB
•
2 oz. copper ground planes on the 2 internal layers
•
6 thermal vias (see the Recommended land pattern,
ELECTRICAL CHARACTERISTICS
T
J
= –40°C to 125°C, V
I
= 3 V to 6 V (unless otherwise noted)
PARAMETER
SUPPLY VOLTAGE, VIN
V
I
Input voltage range, VIN
f
s
= 350 kHz, SYNC = 0.8 V, RT open
Quiescent current
f
s
= 550 kHz, SYNC
≥
2.5 V, RT open,
phase pin open
Shutdown, SS/ENA = 0 V
UNDERVOLTAGE LOCK OUT
Start threshold voltage, UVLO
Stop threshold voltage, UVLO
Hysteresis voltage, UVLO
Rising and falling edge deglitch,
UVLO
(1)
BIAS VOLTAGE
V
O
Output voltage, VBIAS
Output current, VBIAS
Accuracy
Line regulation
(1) (3)
Load
OSCILLATOR
Internally set free-running frequency
range
Externally set free-running frequency
range
High-level threshold voltage, SYNC
Low-level threshold voltage, SYNC
Pulse duration, SYNC
(1)
Frequency range, SYNC
Ramp
valley
(1)
Ramp amplitude (peak-to-peak)
(1)
Minimum controllable on time
Maximum duty cycle
(1)
(2)
(3)
Specified by design
Static resistive loads only
Specified by the circuit used in
90%
50
330
0.75
1
150
1600
SYNC
≤
0.8 V, RT open
SYNC
≥
2.5 V, RT open
RT = 100 kΩ (1% resistor to AGND)
RT = 43 kΩ (1% resistor to AGND)
280
440
460
995
2.5
0.8
350
550
500
1075
420
660
540
1155
kHz
kHz
V
V
ns
kHz
V
V
ns
regulation
(1) (3)
I
L
= 1.5 A, f
s
= 1.1 MHz, T
J
= 25°C
I
L
= 0 A to 3 A, f
s
= 1.1 MHz, T
J
= 25°C
(2)
TEST CONDITIONS
MIN
3
TYP
MAX
6
UNIT
V
6.2
8.4
1
2.95
2.7
0.14
2.8
0.16
2.5
9.6
12.8
1.4
3
mA
V
V
µs
I
(VBIAS)
= 0
2.7
2.8
2.9
100
V
µA
V
%/V
%/A
CUMULATIVE REFERENCE
V
ref
0.882
0.891
0.04
0.09
0.900
REGULATION
3
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