欢迎访问ic37.com |
会员登录 免费注册
发布采购

TPS54317RHFR 参数 Datasheet PDF下载

TPS54317RHFR图片预览
型号: TPS54317RHFR
PDF下载: 下载PDF文件 查看货源
内容描述: 1.6兆赫, 3 V至6 V的输入, 3 -A同步降压SWIFT转换器 [1.6 MHz, 3-V TO 6-V INPUT, 3-A SYNCHRONOUS STEP-DOWN SWIFT CONVERTER]
分类和应用: 转换器输入元件
文件页数/大小: 17 页 / 1128 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号TPS54317RHFR的Datasheet PDF文件第4页浏览型号TPS54317RHFR的Datasheet PDF文件第5页浏览型号TPS54317RHFR的Datasheet PDF文件第6页浏览型号TPS54317RHFR的Datasheet PDF文件第7页浏览型号TPS54317RHFR的Datasheet PDF文件第9页浏览型号TPS54317RHFR的Datasheet PDF文件第10页浏览型号TPS54317RHFR的Datasheet PDF文件第11页浏览型号TPS54317RHFR的Datasheet PDF文件第12页  
www.ti.com
SLVS619A – NOVEMBER 2005 – REVISED FEBRUARY 2006
APPLICATION INFORMATION
shows the schematic diagram for a typical TPS54317 application. The TPS54317 (U1) provides up to
3 A of output current at a nominal output voltage of 1.8 V. For proper thermal performance, the power pad
underneath the TPS54317 integrated circuit needs to be soldered well to the printed circuit board.
C8
1
+
C1
150
m
F 2
2200 pF
C7
150 pF
R3
6.81 kW
R2
9.76 kW
C6
3300 pF
U1
TPS54317
24
23
R4
41.2 kW
22
21
20
19
18
C5
17
C4
0.1
m
F
16
15
14
VSNS
AGND
RT
NC
SYNC
SS/EN
VBIAS
VIN
VIN
VIN
COMP
PWRGD
BOOT
PH
PH
PH
PH
PH
PH
NC
1
2
3
4
5
6
7
8
9
10
C2
100
m
F
C10
100
m
F
C11
1000 pF
C3
0.047
m
F
L1
1.5
m
H
VOUT
PWRGD
R6
10 kW
R1
10 kW
R5
442
W
C9
10
m
F
Open
PGND
13
PGND
PwPd
11
PGND
12
PGND
Figure 10. TPS54317 Schematic
INPUT VOLTAGE
The input to the circuit is a nominal 3.3 VDC, applied
at J1. The optional input filter (C1) is a 150-µF
capacitor, with a maximum allowable ripple current of
3 A. C9 is the decoupling capacitor for the TPS54317
and must be located as close to the device as
possible.
R(
W
) =
51 k
- 4.7 k
ƒ (MHz)
(1)
OUTPUT FILTER
The output filter is composed of a 1.5-µH inductor
and two capacitors. The inductor is a low dc
resistance (0.017
Ω)
type, Coilcraft DO1813P-122HC.
The feedback loop is compensated so that the unity
gain frequency is approximately 75 kHz.
FEEDBACK CIRCUIT
The resistor divider network of R1 and R2 sets the
output voltage for the circuit at 1.8 V. R1, along with
R5, R3, C5, C7, and C8 forms the loop compensation
network for the circuit. For this design, a Type 3
topology is used.
PCB LAYOUT
shows a generalized PCB layout guide for
the TPS54317.
The VIN pins should be connected together on the
printed circuit board (PCB) and bypassed with a low
ESR ceramic bypass capacitor. Care should be taken
to minimize the loop area formed by the bypass
capacitor connections, the VIN pins, and the
TPS54317 ground pins. The minimum recommended
bypass capacitance is 10-µF ceramic with a X5R or
X7R dielectric and the optimum placement is closest
to the VIN pins and the PGND pins.
OPERATING FREQUENCY
In the application circuit, the 1.1-MHz operation is
selected. Connecting a 41.2-kΩ between RT (pin 22)
and analog ground can be used to set the switching
frequency from 280 kHz to 1.6 MHz. To calculate the
RT resistor, use the
8