TC55V8512J/FT-12,-15
DC CHARACTERISTICS
(Ta
=
0° to 70°C, V
DD
=
3.3 V
±
0.3 V)
SYMBOL
I
IL
I
LO
PARAMETER
Input Leakage Current
V
IN
=
0 to V
DD
(Except NU pin)
Output Leakage
Current
Input Current
(NU pin)
CE
=
V
IH
or WE
=
V
IL
or
OE
=
V
IH
,
V
OUT
=
0 to V
DD
TEST CONDITION
MIN
−1
−1
−1
−1
2.4
V
DD
−
0.2
t
cycle
=
12 ns
TYP
MAX
1
UNIT
µA
µA
1
20
1
0.4
0.2
170
140
I
I (NU)
V
IN
=
0 to 0.8 V
V
IN
=
0 to 0.2 V
I
OH
= −2
mA
I
OH
= −100 µA
I
OL
=
2 mA
I
OL
=
100
µA
µA
V
OH
Output High Voltage
V
V
OL
Output Low Voltage
CE
=
V
IL
, I
OUT
=
0 mA,
I
DDO
Operating Current
OE
=
V
IH
,
t
cycle
=
15 ns
t
cycle
=
20 ns
t
cycle
=
25 ns
mA
130
110
50
mA
4
Other Input
=
V
IH
/V
IL
CE
=
V
IH
, Other Input
=
V
IH
or V
IL
I
DDS1
I
DDS2
Standby Current
CE
=
V
DD
−
0.2 V, Other Input
=
V
DD
−
0.2 V or 0.2 V
CAPACITANCE
(Ta
=
25°C, f
=
1 .0 MHz)
SYMBOL
C
IN
C
I/O
Note:
PARAMETER
Input Capacitance
Input/Output Capacitance
V
IN
=
GND
V
I/O
=
GND
TEST CONDITION
MAX
6
8
UNIT
pF
pF
This parameter is periodically sampled and is not 100% tested.
OPERATING MODE
MODE
Read
Write
Outputs Disable
Standby
*
: Don’t care
Note:
The NU pin must be left unconnected or tied to GND or a voltage level of less than 0.8 V.
You must not apply a voltage of more than 0.8 V to the NU.
CE
OE
WE
H
L
H
*
Output
Input
I/O1 to I/O8
POWER
I
DDO
I
DDO
I
DDO
I
DDS
L
L
L
H
L
*
H
*
High Impedance
High Impedance
2001-12-19
3/10
TOSHIBA [ TOSHIBA SEMICONDUCTOR ]
