欢迎访问ic37.com |
会员登录 免费注册
发布采购

TC55V8512J-12 参数 Datasheet PDF下载

TC55V8512J-12图片预览
型号: TC55V8512J-12
PDF下载: 下载PDF文件 查看货源
内容描述: 东芝MOS数字集成电路硅栅CMOS [TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS]
分类和应用: 存储内存集成电路静态存储器光电二极管
文件页数/大小: 10 页 / 163 K
品牌: TOSHIBA [ TOSHIBA SEMICONDUCTOR ]
 浏览型号TC55V8512J-12的Datasheet PDF文件第2页浏览型号TC55V8512J-12的Datasheet PDF文件第3页浏览型号TC55V8512J-12的Datasheet PDF文件第4页浏览型号TC55V8512J-12的Datasheet PDF文件第5页浏览型号TC55V8512J-12的Datasheet PDF文件第6页浏览型号TC55V8512J-12的Datasheet PDF文件第8页浏览型号TC55V8512J-12的Datasheet PDF文件第9页浏览型号TC55V8512J-12的Datasheet PDF文件第10页  
TC55V8512J/FT-12,-15
Note:
(1)
(2)
(3)
(4)
(5)
(6)
Operating temperature (Ta) is guaranteed for transverse air flow exceeding 400 linear feet per minute.
WE remains HIGH for the Read Cycle.
If CE goes LOW coincident with or after WE goes LOW, the outputs will remain at high impedance.
If CE goes HIGH coincident with or before WE goes HIGH, the outputs will remain at high
impedance.
If OE is HIGH during the write cycle, the outputs will remain at high impedance.
The parameters specified below are measured using the load shown in Fig.1.
(A)
(B)
t
COE
, t
OEE
, t
OEW
�½��½��½��½��½��½��½��½��½��½��½��½��½��½��½��½��½�
Output Enable Time
t
COD
, t
ODO
, t
ODW
�½��½��½��½��½��½��½��½��½��½��½��½��½��½��½��½�
Output Disable Time
CE
,
OE
WE
(A)
0.2 V
0.2 V
INDETERMINATE
(B)
0.2 V
D
OUT
Hi-Z
VALID DATA OUT
INDETERMINATE
Hi-Z
0.2 V
2001-12-19
7/10