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TC55V8512J-12 参数 Datasheet PDF下载

TC55V8512J-12图片预览
型号: TC55V8512J-12
PDF下载: 下载PDF文件 查看货源
内容描述: 东芝MOS数字集成电路硅栅CMOS [TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS]
分类和应用: 存储内存集成电路静态存储器光电二极管
文件页数/大小: 10 页 / 163 K
品牌: TOSHIBA [ TOSHIBA SEMICONDUCTOR ]
 浏览型号TC55V8512J-12的Datasheet PDF文件第1页浏览型号TC55V8512J-12的Datasheet PDF文件第2页浏览型号TC55V8512J-12的Datasheet PDF文件第3页浏览型号TC55V8512J-12的Datasheet PDF文件第5页浏览型号TC55V8512J-12的Datasheet PDF文件第6页浏览型号TC55V8512J-12的Datasheet PDF文件第7页浏览型号TC55V8512J-12的Datasheet PDF文件第8页浏览型号TC55V8512J-12的Datasheet PDF文件第9页  
TC55V8512J/FT-12,-15
AC CHARACTERISTICS
(Ta
=
0° to 70°C
READ CYCLE
TC55V8512J/FT
SYMBOL
PARAMETER
MIN
t
RC
t
ACC
t
CO
t
OE
t
OH
t
COE
t
OEE
t
COD
t
ODO
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Output Data Hold Time from Address Change
Output Enable Time from Chip Enable
Output Enable Time from Output Enable
Output Disable Time from Chip Enable
Output Disable Time from Output Enable
12
3
3
1
-12
MAX
12
12
6
7
7
MIN
15
4
4
1
-15
MAX
15
15
8
8
8
ns
UNIT
(See Note 1)
, V
DD
=
3.3 V
±
0.3 V)
WRITE CYCLE
TC55V8512J/FT
SYMBOL
PARAMETER
MIN
t
WC
t
WP
t
CW
t
AW
t
AS
t
WR
t
DS
t
DH
t
OEW
t
ODW
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Address Valid to End of Write
Address Setup Time
Write Recovery Time
Data Setup Time
Data Hold Time
Output Enable Time from Write Enable
Output Disable Time from Write Enable
12
8
10
10
0
0
7
0
1
-12
MAX
7
MIN
15
9
12
12
0
0
8
0
1
-15
MAX
8
ns
UNIT
AC TEST CONDITIONS
PARAMETER
Input Pulse Level
Input Pulse Rise and Fall Time
Input Timing Measurement
Reference Level
Output Timing Measurement
Reference Level
Output Load
TEST CONDITION
3.0 V/ 0.0 V
2 ns
1.5 V
Fig.1
3.3 V
1200
I/O pin
R
L
=
50
V
L
=
1.5 V
1.5 V
Fig.1
870
I/O pin Z
0
=
50
C
L
=
30 pF
C
L
=
5 pF
(For t
COE
, t
OEE
, t
COD
,
t
ODO
, t
OEW
and t
ODW
)
2001-12-19
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