WM2604
Production Data
DEVICE DESCRIPTION
GENERAL FUNCTION
The device uses a resistor string network buffered with an op amp to convert 10-bit digital data to analogue
voltage levels (see Block Diagram). The output voltage is determined by the reference input voltage and
the input code according to the following relationship:
Output voltage = 2
(
V
REF
)
INPUT
11
1111
:
10
10
01
0000
0000
1111
:
00
00
0000
0000
0001
0000
0001
0000
1111
1111
CODE
1024
OUTPUT
2
(
V
REF
)
:
2
(
V
REF
)
2
(
V
REF
)
513
1024
1023
1024
512
=
V
REF
1024
511
1024
1
1024
2
(
V
REF
)
:
2
(
V
REF
)
0V
Table 1 Binary Code Table (0V to 2V
REFIN
Output), Gain = 2
POWER ON RESET
An internal power-on-reset circuit resets the DAC registers to all 0s on power-up.
BUFFER AMPLIFIER
The output buffer has a near rail-to-rail output with short circuit protection and can reliably drive a 2kΩ load
with a 100pF load capacitance.
EXTERNAL REFERENCE
The reference voltage input is buffered which makes the DAC input resistance independent of code.
REFINAB and REFINCD pins have an input resistance of 10MΩ and an input capacitance of typically
5pF. The reference voltage determines the DAC full-scale output.
HARDWARE CONFIGURATION OPTIONS
The device has two configuration options that are controlled by device pins.
DEVICE POWER DOWN
The device can be powered-down by pulling pin NPD (Pin 2) high. This powers down all DACs overriding
their individual power down settings. This will reduce power consumption to typically 10nA. When the
power down function is released the device reverts to the DAC code set prior to power down.
SIMULTANEOUS DAC UPDATE
The NLDAC pin (Pin 3) can be held high to prevent serial word writes from updating the DAC latches. By
writing new values to multiple DACs then pulling NLDAC low, all new DAC codes are loaded into the DAC
latches simultaneously.
WOLFSON MICROELECTRONICS LTD
PD Rev 1.0 June 1999
8
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
