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产品型号CSD16403Q5A的概述

CSD16403Q5A 芯片概述 CSD16403Q5A 是由德州仪器(Texas Instruments, TI)开发的一款高效双通道 MOSFET(金属氧化物半导体场效应管)。该芯片在电源管理和电压调节方面展现出了优异的性能,广泛应用于各类电力电子设备中,如开关电源、DC-DC 转换器和电池管理系统等。结合其低导通电阻、快速开关速度以及低栅极电荷特性,CSD16403Q5A 特别适合用于需要高效能和高可靠性的场合。 CSD16403Q5A 的详细参数 CSD16403Q5A 的主要参数包括: 1. 最大电压(VDS):30V 2. 最大电流(ID):68A(在适当的散热条件下) 3. 导通电阻(RDS(on)):低达 4.2mΩ 4. 开关时间(td(on) 与 td(off)):典型值为 22ns 和 45ns 5. 栅极电荷(QG):典型值为 15nC 6. 工作温度范围:-5...

产品型号CSD16403Q5A的Datasheet PDF文件预览

CSD16403Q5A  
www.ti.com  
SLPS201A AUGUST 2009REVISED SEPTEMBER 2010  
N-Channel NexFET™ Power MOSFETs  
Check for Samples: CSD16403Q5A  
1
FEATURES  
PRODUCT SUMMARY  
2
Ultra Low Qg and Qgd  
Low Thermal Resistance  
Avalanche Rated  
VDS  
Qg  
Drain to Source Voltage  
Gate Charge Total (4.5V)  
Gate Charge Gate to Drain  
25  
13.3  
3.5  
V
nC  
nC  
m  
mΩ  
V
Qgd  
Pb Free Terminal Plating  
RoHS Compliant  
VGS = 4.5V  
VGS = 10V  
1.6  
2.9  
2.2  
RDS(on) Drain to Source On Resistance  
VGS(th) Threshold Voltage  
Halogen Free  
SON 5mm x 6mm Plastic Package  
ORDERING INFORMATION  
Device  
Package  
Media  
Qty  
Ship  
APPLICATIONS  
SON 5X6 Plastic  
Package  
13-inch  
reel  
Tape and  
Reel  
CSD16403Q5A  
2500  
Point-of-Load Synchronous Buck Converter  
for Applications in Networking, Telecom and  
Computing Systems  
ABSOLUTE MAXIMUM RATINGS  
TA = 25°C unless otherwise stated  
Optimized for Control FET Applications  
VALUE  
UNIT  
V
VDS  
VGS  
Drain to Source Voltage  
25  
DESCRIPTION  
Gate to Source Voltage  
+16 / –12  
100  
V
The NexFET™ power MOSFET has been designed  
to minimize losses in power conversion applications.  
Continuous Drain Current, TC = 25°C  
Continuous Drain Current(1)  
Pulsed Drain Current, TA = 25°C(2)  
Power Dissipation(1)  
A
ID  
28  
A
IDM  
PD  
TJ,  
184  
A
Top View  
3.1  
W
Operating Junction and Storage  
TSTG Temperature Range  
S
S
S
G
1
2
3
4
8
7
6
5
D
D
D
–55 to 150  
224  
°C  
Avalanche Energy, single pulse  
ID = 67A, L = 0.1mH, RG = 25Ω  
EAS  
mJ  
(1) RqJA = 41°C/W on 1in2 Cu FR4 PCB.  
(2) Pulse width 300ms, duty cycle 2%  
D
D
P0093-01  
RDS(ON) vs VGS  
Gate Charge  
10  
8
12  
I
V
= 20A  
I
D
= 20A  
D
= 12.5V  
DS  
10  
8
6
T
= 125°C  
C
6
4
4
2
2
T
= 25°C  
C
0
0
0
2
4
6
8
10  
12  
0
3
6
9
12 15 18 21 24 27 30 33  
V
GS  
− Gate to Source Voltage − V  
Q − Gate Charge − nC  
g
G006  
G003  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NexFET is a trademark of Texas Instruments.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009–2010, Texas Instruments Incorporated  
 
 
CSD16403Q5A  
SLPS201A AUGUST 2009REVISED SEPTEMBER 2010  
www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
ELECTRICAL CHARACTERISTICS  
(TA = 25°C unless otherwise stated)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Static Characteristics  
BVDSS  
IDSS  
Drain to Source Voltage  
VGS = 0V, ID = 250mA  
25  
V
mA  
nA  
V
Drain to Source Leakage Current  
Gate to Source Leakage Current  
Gate to Source Threshold Voltage  
VGS = 0V, VDS = 20V  
VDS = 0V, VGS = +16/-12V  
VDS = VGS, ID = 250mA  
VGS = 4.5V, ID = 20A  
VGS = 10V, ID = 20A  
VDS = 15V, ID = 20A  
1
100  
1.9  
3.7  
2.8  
IGSS  
VGS(th)  
1.2  
1.6  
2.9  
2.2  
91  
mΩ  
mΩ  
S
RDS(on)  
gfs  
Drain to Source On Resistance  
Transconductance  
Dynamic Characteristics  
CISS  
COSS  
CRSS  
Rg  
Input Capacitance  
2040  
1600  
115  
1.2  
2660  
2080  
160  
2.4  
pF  
pF  
pF  
Output Capacitance  
Reverse Transfer Capacitance  
Series Gate Resistance  
Gate Charge Total (4.5V)  
Gate Charge Gate to Drain  
Gate Charge Gate to Source  
Gate Charge at Vth  
Output Charge  
VGS = 0V, VDS = 12.5V , f = 1MHz  
Qg  
13.3  
3.5  
18  
nC  
nC  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
Qgd  
Qgs  
Qg(th)  
QOSS  
td(on)  
tr  
VDS = 12.5V, ID = 20A  
VDS = 13.5V, VGS = 0V  
5.5  
3.1  
33  
Turn On Delay Time  
Rise Time  
11.8  
18.3  
15.2  
9.2  
VDS = 12.5V, VGS = 4.5V, ID = 20A,  
RG = 2Ω  
td(off)  
tf  
Turn Off Delay Time  
Fall Time  
Diode Characteristics  
VSD  
Qrr  
trr  
Diode Forward Voltage  
IS = 20A, VGS = 0V  
0.8  
47  
35  
1.0  
V
Reverse Recovery Charge  
Reverse Recovery Time  
VDD = 13.5V, IF = 20A, di/dt = 300A/ms  
VDD = 13.5V, IF = 20A, di/dt = 300A/ms  
nC  
ns  
THERMAL CHARACTERISTICS  
(TA = 25°C unless otherwise stated)  
PARAMETER  
Thermal Resistance Junction to Case(1)  
Thermal Resistance Junction to Ambient(1) (2)  
MIN  
TYP  
MAX  
1.8  
UNIT  
°C/W  
°C/W  
R qJC  
R qJA  
51  
(1)  
RqJC is determined with the device mounted on a 1 inch square 2 oz. Cu pad on a 1.5 × 1.5 in 0.060 inch thick FR4 board. RqJC is  
specified by design while RqJA is determined by the user’s board design.  
(2) Device mounted on FR4 Material with 1 inch2 of 2 oz. Cu.  
2
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Copyright © 2009–2010, Texas Instruments Incorporated  
Product Folder Link(s): CSD16403Q5A  
CSD16403Q5A  
www.ti.com  
SLPS201A AUGUST 2009REVISED SEPTEMBER 2010  
GATE  
Source  
GATE  
Source  
Max RqJA = 118°C/W  
when mounted on  
minimum pad area of 2  
oz. Cu.  
Max RqJA = 51°C/W  
when mounted on 1  
inch2 of 2 oz. Cu.  
DRAIN  
DRAIN  
M0137-02  
M0137-01  
TYPICAL MOSFET CHARACTERISTICS  
(TA = 25°C unless otherwise stated)  
10  
1
0.5  
0.3  
0.1  
0.1  
0.05  
Duty Cycle = t1/t2  
0.02  
0.01  
P
0.01  
0.001  
0.0001  
t1  
t2  
Single Pulse  
R
qJA = 94°C/W (min Cu)  
TJ = P ´ ZqJA ´ RqJA  
0.001  
0.01  
0.1  
1
10  
100  
1k  
tp – Pulse Duration – s  
G012  
Figure 1. Transient Thermal Impedance  
Copyright © 2009–2010, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
Product Folder Link(s): CSD16403Q5A  
CSD16403Q5A  
SLPS201A AUGUST 2009REVISED SEPTEMBER 2010  
www.ti.com  
TYPICAL MOSFET CHARACTERISTICS (continued)  
(TA = 25°C unless otherwise stated)  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
80  
70  
60  
50  
40  
30  
20  
10  
0
80  
70  
60  
50  
40  
30  
20  
10  
0
V
DS  
= 5V  
V
= 3V  
GS  
V
= 10V  
GS  
V
= 4.5V  
GS  
T
C
= 125°C  
C
V
GS  
= 3.5V  
T
= 25°C  
V
= 2.5V  
2.5  
GS  
T
= −55°C  
C
0.0  
0.5  
1.0  
1.5  
2.0  
3.0  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
V
DS  
− Drain to Source Voltage − V  
V
GS  
− Gate to Source Voltage − V  
G001  
G002  
Figure 2. Saturation Characteristics  
Figure 3. Transfer Characteristics  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
12  
10  
8
6
5
4
3
2
1
0
I
V
= 20A  
f = 1MHz  
= 0V  
D
= 12.5V  
V
DS  
GS  
C
OSS  
= C + C  
DS GD  
C
ISS  
= C  
+ C  
GD GS  
6
4
C
RSS  
= C  
GD  
2
0
0
3
6
9
12 15 18 21 24 27 30 33  
− Gate Charge − nC  
0
5
10  
15  
20  
25  
Q
V
DS  
− Drain to Source Voltage − V  
g
G003  
G004  
Figure 4. Gate Charge  
Figure 5. Capacitance  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
2.00  
1.75  
1.50  
1.25  
1.00  
0.75  
0.50  
10  
8
I
D
= 250µA  
I = 20A  
D
6
T
= 125°C  
C
4
2
T
= 25°C  
C
0
−75  
−25  
25  
75  
125  
175  
0
2
4
6
8
10  
12  
T
− Case Temperature − °C  
V
GS  
− Gate to Source Voltage − V  
C
G005  
G006  
Figure 6. Threshold Voltage vs Temperature  
Figure 7. On Resistance vs Gate Voltage  
4
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Copyright © 2009–2010, Texas Instruments Incorporated  
Product Folder Link(s): CSD16403Q5A  
CSD16403Q5A  
www.ti.com  
SLPS201A AUGUST 2009REVISED SEPTEMBER 2010  
TYPICAL MOSFET CHARACTERISTICS (continued)  
(TA = 25°C unless otherwise stated)  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
100  
10  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
I
V
= 20A  
D
= 10V  
GS  
1
T
= 125°C  
C
0.1  
T
= 25°C  
C
0.01  
0.001  
0.0001  
−75  
−25  
25  
75  
125  
175  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
T
− Case Temperature − °C  
V
SD  
− Source to Drain Voltage − V  
C
G007  
G008  
Figure 8. On Resistance vs Temperature  
Figure 9. Typical Diode Forward Voltage  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
1k  
100  
10  
1k  
100  
10  
1ms  
T
= 25°C  
C
10ms  
T
= 125°C  
C
100ms  
1
Area Limited  
by R  
DS(on)  
1s  
0.1  
0.01  
Single Pulse  
= 94oC/W (min Cu)  
DC  
R
qJA  
1
0.01  
0.1  
1
10  
100  
0.01  
0.1  
1
10  
100  
V
− Drain To Source Voltage − V  
t
− Time in Avalanche − ms  
(AV)  
DS  
G010  
G009  
Figure 10. Maximum Safe Operating Area  
Figure 11. Single Pulse Unclamped Inductive Switching  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
120  
100  
80  
60  
40  
20  
0
−50  
0
50  
100  
150  
200  
T
− Case Temperature − °C  
C
G011  
Figure 12. Maximum Drain Current vs Temperature  
Copyright © 2009–2010, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Link(s): CSD16403Q5A  
CSD16403Q5A  
SLPS201A AUGUST 2009REVISED SEPTEMBER 2010  
www.ti.com  
MECHANICAL DATA  
Q5A Package Dimensions  
E2  
L
H
K
q
L1  
Top View  
Side View  
Bottom View  
q
E1  
E
Front View  
M0135-01  
DIM  
MILLIMETERS  
NOM  
MIN  
0.90  
0.33  
0.20  
4.80  
3.61  
5.90  
5.70  
3.38  
MAX  
1.10  
0.51  
0.30  
5.00  
3.96  
6.10  
5.80  
3.78  
A
b
1.00  
0.41  
c
0.25  
D1  
D2  
E
4.90  
3.81  
6.00  
E1  
E2  
e
5.75  
3.58  
1.27 BSC  
0.51  
H
0.41  
1.10  
0.51  
0.06  
0°  
0.61  
K
L
0.61  
0.13  
0.71  
0.20  
12°  
L1  
q
For recommended circuit layout for PCB designs, see application note SLPA005 Reducing Ringing Through  
PCB Layout Techniques.  
6
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Copyright © 2009–2010, Texas Instruments Incorporated  
Product Folder Link(s): CSD16403Q5A  
CSD16403Q5A  
www.ti.com  
SLPS201A AUGUST 2009REVISED SEPTEMBER 2010  
MILLIMETERS  
INCHES  
DIM  
Recommended PCB Pattern  
MIN  
MAX  
6.305  
4.56  
4.56  
0.7  
MIN  
MAX  
0.248  
0.18  
F1  
F1  
F2  
6.205  
4.46  
4.46  
0.65  
0.62  
0.63  
0.7  
0.244  
0.176  
0.176  
0.026  
0.024  
0.025  
0.028  
0.026  
0.024  
0.193  
0.176  
F7  
F6  
F3  
0.18  
F4  
0.028  
0.026  
0.027  
0.031  
0.028  
0.026  
0.197  
0.18  
F5  
0.67  
0.68  
0.8  
F6  
F7  
F8  
0.65  
0.62  
4.9  
0.7  
F9  
0.67  
5
F10  
F11  
4.46  
4.56  
F10  
M0139-01  
Q5A Tape and Reel Information  
K0  
4.00 0.10 ꢀ(SS ꢁNoS 1ꢂ  
0.30 0.05  
2.00 0.05  
+0.10  
–0.00  
Ø 1.50  
B0  
A0  
8.00 0.10  
R 0.30 MAX  
Ø 1.50 MIꢁ  
R 0.30 TYP  
A0 = 6.50 0.10  
B0 = 5.30 0.10  
K0 = 1.40 0.10  
M0138-01  
Notes:  
1. 10 sprocket hole pitch cumulative tolerance ±0.2  
2. Camber not to exceed 1mm IN 100mm, noncumulative over 250mm  
3. Material:black static dissipative polystyrene  
4. All dimensions are in mm (unless otherwise specified)  
5. A0 and B0 measured on a plane 0.3mm above the bottom of the pocket  
6. MSL1 260°C (IR and Convection) PbF Reflow Compatible  
REVISION HISTORY  
Changes from Original (August 2009) to Revision A  
Page  
Deleted the Package Marking Information section ............................................................................................................... 7  
Copyright © 2009–2010, Texas Instruments Incorporated  
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Product Folder Link(s): CSD16403Q5A  
 
PACKAGE MATERIALS INFORMATION  
www.ti.com  
7-Apr-2011  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
CSD16403Q5A  
SON  
DQJ  
8
2500  
330.2  
12.4  
6.5  
5.3  
1.4  
8.0  
12.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
7-Apr-2011  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SON DQJ  
SPQ  
Length (mm) Width (mm) Height (mm)  
347.0 342.0 55.0  
CSD16403Q5A  
8
2500  
Pack Materials-Page 2  
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配单直通车
CSD16403Q5A产品参数
型号:CSD16403Q5A
Brand Name:Texas Instruments
是否无铅: 不含铅
是否Rohs认证: 符合
生命周期:Active
IHS 制造商:TEXAS INSTRUMENTS INC
包装说明:6 X 5 MM, ROHS COMPLIANT, PLASTIC, SON-8
针数:8
Reach Compliance Code:not_compliant
ECCN代码:EAR99
HTS代码:8541.29.00.95
Factory Lead Time:16 weeks
风险等级:1.7
Is Samacsys:N
其他特性:AVALANCHE RATED
雪崩能效等级(Eas):224 mJ
外壳连接:DRAIN
配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:25 V
最大漏极电流 (Abs) (ID):100 A
最大漏极电流 (ID):28 A
最大漏源导通电阻:0.0037 Ω
FET 技术:METAL-OXIDE SEMICONDUCTOR
最大反馈电容 (Crss):160 pF
JESD-30 代码:R-PDSO-N8
JESD-609代码:e3
湿度敏感等级:1
元件数量:1
端子数量:5
工作模式:ENHANCEMENT MODE
最高工作温度:150 °C
最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE
峰值回流温度(摄氏度):260
极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):3.1 W
最大脉冲漏极电流 (IDM):184 A
认证状态:Not Qualified
子类别:FET General Purpose Power
表面贴装:YES
端子面层:Matte Tin (Sn)
端子形式:NO LEAD
端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING
晶体管元件材料:SILICON
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