REF02RC/883应用文章市场行情现货热卖使用介绍供应商报价-中国IC网-芯三七

5 V Precision Voltage

Reference/Temperature Transducer

REF02

FEATURES

PIN CONFIGURATIONS

NC

8

5 V output, 0.3ꢀ max

NC

1

3

7

5

Temperature voltage output, 1.96 mV/°C

Adjustment range, 3ꢀ min

Excellent temperature stability, 8.5 ppm/°C max

Low noise, 15 µV p-p max

V

2

6

V

OUT

IN

NC

TRIM

4

GROUND

(CASE)

Low supply current, 1.4 mA max

Wide input voltage range, 7 V to 40 V

High load-driving capability, 10 mA

No external components

NC = NO CONNECT. DO NOT CONNECT ANYTHING

ON THESE PINS. SOME OF THEM ARE RESERVED

FOR FACTORY TESTING PURPOSES.

Figure 1. TO-99 (J-Suffix)

8

7

6

5

NC

1

2

3

4

Short-circuit proof

REF02

V

IN

TOP VIEW

TEMP

GND

V

OUT

(Not to Scale)

TRIM

GENERAL DESCRIPTION

NC = NO CONNECT. DO NOT CONNECT ANYTHING

ON THESE PINS. SOME OF THEM ARE RESERVED

FOR FACTORY TESTING PURPOSES.

The REF02 precision voltage reference provides a stable 5 V

output that can be adjusted over a ±±6 range with minimal

effect on temperature stability. Single-supply operation over an

input voltage range of 7 V to 40 V, low current drain of 1 mA,

and excellent temperature stability are achieved with an

improved band gap design. Low cost, low noise, and low power

make the REF02 an excellent choice whenever a stable voltage

reference is required. Applications include DACs and ADCs,

portable instrumentation, and digital voltmeters. The versatility

of the REF02 is enhanced by its use as a monolithic temperature

transducer. For new designs, refer to ADR02.

Figure 2. 8-Lead PDIP (P-Suffix), 8-Lease CERDIP (Z-Suffix),

8-Lead SOIC (S-Suffix)

3

2

1

20 19

4

5

6

7

8

18

17

16

15

14

NC

V

IN

REF02

NC

TEMP

NC

TOP VIEW

(Not to Scale)

V

OUT

NC

9

10 11 12 13

NC = NO CONNECT. DO NOT CONNECT ANYTHING

ON THESE PINS. SOME OF THEM ARE RESERVED

FOR FACTORY TESTING PURPOSES.

Figure 3. REF02RC/883 LCC (RC-Suffix)

INPUT

2

OUTPUT RESISTORS

R8

R7

R14

REF02 OPTION

R9

R11

R12

Z PACKAGE AND

883C PRODUCT

18kΩ

2kΩ

6.1kΩ

Q15

R15

Q14

Q13

Q8

Q7

Q9

P, S, RJ PACKAGES 18kΩ

4.5kΩ

15kΩ

Q18

Q12

Q11

Q16

Q19

Q21

C1

R4

Q17

Q10

R6

Q6

Q5

OUTPUT

6

5

4

R13

R3

R12*

R9*

Q4

Q3

TRIM

R5

≈

1.23V

Q20

R10

Q2

Q1

R1

R11*

3

TEMP

R2

GROUND

*SEE OUTPUT RESISTORS

Figure 4. Simplified Schematic

Rev. F

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.326.8703

www.analog.com

REF02

TABLE OF CONTENTS

Specifications..................................................................................... 3

Electrical Specifications............................................................... 3

Electrical Specifications............................................................... 4

Electrical Specifications............................................................... 5

Electrical Specifications............................................................... ±

Absolute Maximum Ratings............................................................ 7

ESD Caution.................................................................................. 7

Typical Performance Characteristics ............................................. 8

Output Adjustment ........................................................................ 10

Temperature Monitoring........................................................... 10

Reference Stack with Excellent Line Regulation.................... 11

Precision Current Source .......................................................... 11

Supply Bypassing........................................................................ 12

Outline Dimensions....................................................................... 13

Outline Dimensions....................................................................... 14

Ordering Guide .......................................................................... 15

REVISION HISTORY

7/04—Data Sheet Changed from Rev. E to Rev. F

10/03—Data Sheet Changed from Rev. C to Rev. D.

Updated Format..................................................................Universal

Changes to Simplified Schematic ................................................... 1

Changes to Specifications................................................................ 3

Changes to Specifications................................................................ 4

Changes to Specifications................................................................ 5

Changes to Specifications................................................................ ±

Changes to Figure 18...................................................................... 10

Changes to Ordering Guide .......................................................... 15

3/04—Data Sheet Changed from Rev. D to Rev. E.

Updated TPCs.....................................................................Universal

Changes to Features .........................................................................1

Changes to Electrical Specifications ..............................................2

Change to Absolute Maximum Ratings ........................................4

Changes to Ordering Guide.............................................................4

Deleted Typical Electrical Characteristics table........................... 4

Deleted Wafer Test Limits ................................................................4

Deleted Figure 1.................................................................................4

10/02—Data Sheet Changed from Rev. B to Rev. C.

Changes to Features.......................................................................... 1

Changes to Specifications................................................................ 2

Changes to Ordering Guide ............................................................ 4

Replaced TPCs 3 and 4 .................................................................... 5

Added Temperature Monitoring section ...................................... 7

Updated Figure 5 ............................................................................. 7

Deleted Table I .................................................................................. 7

Updated Figure ± ............................................................................. 7

Changes to Features ..........................................................................1

Changes to General Description .....................................................1

Changes to Simplified Schematic....................................................1

Changes to Specifications.................................................................2

Changes to Absolute Maximum Ratings .......................................5

Changes to Package Type ................................................................5

Changes to Ordering Guide.............................................................5

Updated to Outline Dimensions .................................................. 11

Revision 0: Initial Version

Rev. F | Page 2 of 16

REF02

SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

@ V_IN= 15 V, T_A= +25°C, unless otherwise noted.

Table 1.

REF02A/REF02E

Min Typ Max

4.985 5.000 5.015 4.975 5.000 5.025

REF02/REF02H

Parameter

Symbol

V_O

Conditions

Unit

V

Min

Typ Max

Output Voltage

I_L= 0 mA

Output Adjustment Range

Output Voltage Noise¹

Line Regulation²

R_P= 10 kΩ

3

6

3

6

%

∆V_TRIM

e_np-p

0.1 Hz to 10 Hz

V_IN= 8 V to 40 V

I_L= 0 mA to 10 mA

To 0.1% of Final Value

No Load

10

15

10

15

µV p-p

0.006 0.010

0.005 0.010

5

0.006 0.010 %/V

0.006 0.010 %/mA

Load Regulation²

Turn-on Settling Time¹

Quiescent Supply Current

Load Current

t_ON

I_SY

I_L

5

µs

1.0

1.4

1.0

1.4

mA

10

–0.3

Sink Current³

I_S

–0.5

30

–0.5

30

−0.3

Short-Circuit Current

Temperature Voltage Output⁴

Z Package and 883C Product

P, S, and J Packages

I_SC

V_O= 0

V_T

630

550

630

550

mV

¹Guaranteed by design.

²Line and load regulation specifications include the effect of self-heating.

³During sink current test the device meets the output voltage specified.

⁴Limit current in or out of Pin 3 to 50 nA and capacitance on Pin 3 to 30 pF.

Rev. F | Page 3 of 16

REF02

ELECTRICAL SPECIFICATIONS

@ V_IN= 15 V, −55°C ≤ T_A≤ +125°C for REF02A and REF02, 0°C ≤T_A≤ 70°C for REF02E and REF02H, I_L= 0 mA, unless otherwise

noted.

Table 2.

REF02A/REF02E

Min Typ Max

0.02 0.06

REF02/REF02H

Min Typ Max

Parameter

Symbol

Conditions

Unit

%

Output Voltage Change

with Temperature^{1, 2}

Output Voltage

0.07

0.18

0.17

0.45

∆V_OT

0°C ≤ T_A≤ 70°C

−55°C ≤T_A≤+125°C

0.06

0.15

%

Temperature Coefficient³

Change in V_OTemperature

Coefficient with Output

Adjustment

Line Regulation

(V_IN= 8 V to 40 V)⁴

TCV_O

3

8.5

10

25

ppm/°C

R_P= 10 kΩ

0.7

ppm/%

%/V

0.007

0.009

0.006

0.007

0.012

0.015

0.010

0.012

0.007

0.009

0.007

0.009

0°C ≤ T_A≤ 70°C

−55°C ≤ T_A≤ +125°C

0°C ≤ T_A≤ 70°C

−55°C ≤ T_A≤ +125°C

0.012

0.015

0.012

0.015

%/V

Load Regulation

%/mA

(I_L= 0 mA to 8 mA)⁴

Temperature Voltage Output

Temperature Coefficient⁵

Z Package and 883C Product

P, S, and J Packages

TCV_T

2.10

1.96

2.10

1.96

mV/°C

¹∆V_OTis defined as the absolute difference between the maximum output voltage and the minimum output voltage over the specified temperature range expressed as

a percentage of 5 V:

V_MAX−V_MIN

∆V_OT

=

×100

5V

²∆V_OTspecification applies trimmed to 5,000 V or untrimmed.

³TCV_Ois defined as ∆V_OTdivided by the temperature range, i.e.,

∆V_OT

70°C

TCV_O=

⁴Line and load regulation specifications include the effect of self-heating.

⁵Limit current in or out of Pin 3 to 50 nA and capacitance on Pin 3 to 30 pF.

Rev. F | Page 4 of 16

REF02

ELECTRICAL SPECIFICATIONS

@ V_IN= 15 V, T_A= 25°C, unless otherwise noted.

Table 3.

REF02C

Typ

REF02D

Typ Max

Parameter

Symbol

V_O

Conditions

Unit

V

%

Min

Max

Min

Output Voltage

I_L= 0 mA

R_P= 10 kΩ

4.950 5.000 5.050 4.900 5.000 5.100

2.7 6.0 2.0 6.0

12 12

Output Adjustment Range

Output Voltage Noise¹

Line Regulation²

∆V_TRIM

e_np-p

0.1 Hz to 10 Hz

V_IN= 8 V to 40 V

I_L= 0 mA to 8 mA

I_L= 0 mA to 4 mA

To 0.1% of Final Value

No Load

18

µV p-p

%/V

%/mA

µs

mA

0.009 0.015

0.006 0.015

0.010 0.04

Load Regulation²

0.015 0.04

5

Turn-On Settling Time¹

Quiescent Supply Current

Load Current

t_ON

I_SY

I_L

I_S

I_SC

5

1.0

1.6

1.0

2.0

8

−0.3

8

−0.3

Sink Current³

−0.5

30

−0.5

30

Short-Circuit Current

Temperature Voltage Output⁴

Z Package and 883C Product

P, S, and J Packages

V_O= 0

V_T

630

550

630

550

mV

¹Guaranteed by design.

²Line and load regulation specifications include the effect of self-heating.

³During sink current test the device meets the output voltage specified.

⁴Limit current in or out of Pin 3 to 50 nA and capacitance on Pin 3 to 30 pF.

Rev. F | Page 5 of 16

REF02

ELECTRICAL SPECIFICATIONS

@ V_IN= 15 V, I_L= 0 mA, 0°C≤T_A≤ 70°C for REF02CJ, REF02CZ, REF02DP, and −40°C ≤T_A≤+85°C for REF02CP and REF02CS, unless

otherwise noted.

Table 4.

REF02C

Typ

REF02D

Typ

Parameter

Symbol

∆V_OT

Conditions

Unit

%

Min

Max

0.45

65

Min

Max

1.7

Output Voltage Change

with Temperature^{1, 2}

Output Voltage³

Temperature Coefficient

Change in V_OTemperature

Coefficient with Output

Adjustment

0.14

20

0.49

70

TCV_O

250

ppm/°C

R_P= 10 kΩ

V_IN= 8 V to 40 V

I_L= 0 mA to 5 mA

0.7

0.011

0.008

0.7

0.012

0.016

ppm/%

%/V

%/mA

Line Regulation⁴

Load Regulation⁴

0.018

0.05

Temperature Voltage Output

Temperature Coefficient⁵

Z Package and 883C Product

P, S, and “J” Packages

TCV_T

2.10

1.96

2.10

1.96

mV/°C

¹∆V_OTis defined as the absolute difference between the maximum output voltage and the minimum output voltage over the specified temperature range expressed as

a percentage of 5 V:

V_MAX−V_MIN

∆V_OT

=

×100

5V

²∆V_OTspecification applies trimmed to 5,000 V or untrimmed.

³TCV_Ois defined as ∆V_OTdivided by the temperature range, i.e.,

∆V_OT

70°C

TCV_O=

⁴Line and load regulation specifications include the effect of self-heating.

⁵Limit current in or out of Pin 3 to 50 nA and capacitance on Pin 3 to 30 pF.

Rev. F | Page 6 of 16

REF02

ABSOLUTE MAXIMUM RATINGS

Table 5.

Table 6. Package Thermal Resistance

Parameter

Rating

Package Type

Unit

°C/W

θ_JA

θ_JC

24

26

50

40

44

Input Voltage

Output Short-Circuit Duration

to Ground or V_IN

40 V

TO-99 (J)

8-Lead CERDIP (Z)

8-Lead PDIP (P)

20-Terminal Ceramic LCC (RC) 120

8-Lead SOIC (S) 160

*θ_JAis specified for worst-case mounting conditions, i.e. ,θ_JAis specified for

device in socket for TO, CERDIP, PDIP, and LCC packages; θ_JAis specified for

device soldered to printed circuit board for SOIC packages.

170

162

110

Indefinite

Storage Temperature

J, RC, and Z Packages

P Package

Operating Temperature Range

REF02A, REF02J, REF02RC

REF02CJ, REF02CZ

REF02CP, REF02CS, REF02E,

REF02H

–65°C to +150°C

–65°C to +125°C

–55°C to +125°C

0°C to 70°C

–40°C to +85°C

Lead Temperature Range (Soldering 10 sec) 300°C

Absolute maximum ratings apply to both DICE packaged parts,

unless otherwise noted.

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions outside of those indicated in the operation

sections of this specification is not implied. Exposure to

absolute maximum ratings for extended periods may affect

device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on

the human body and test equipment and can discharge without detection. Although this product features

proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy

electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance

degradation or loss of functionality.

Rev. F | Page 7 of 16

REF02

TYPICAL PERFORMANCE CHARACTERISTICS

10k

20

19

18

17

16

15

14

V

= 15V

IN

A

T

= 25°C

A

T

= 25°C

1k

100

10

100

1k

10k

100k

1M

10

15

20

25

30

35

40

FREQUENCY (Hz)

INPUT VOLTAGE (V)

Figure 5. Output Wideband Noise vs. Bandwidth (0.1 Hz to

Frequency Indicated)

Figure 8. Maximum Load Current vs. Input Voltage

0.0031

0.0100

0.0310

0.1000

0.3100

1.0000

3.1000

10.0000

76

66

56

46

36

26

16

0

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

0.6

V

= 15V

IN

V

T

= 15V

= 25°C

IN

A

10

100

1k

10k

100k

1M

–60 –40 –20

0

20

40

60

80

100 120 140

FREQUENCY (Hz)

TEMPERATURE (°C)

Figure 6. Line Regulation vs. Frequency

Figure 9. Normalized Load Regulation (∆IL = 10 mA) vs. Temperature

0.016

0.014

0.012

0.010

0.008

0.006

0.004

0.002

0

1.4

V

= 15V

IN

1.3

1.2

1.1

1.0

0.9

0.8

0.7

0.6

DEVICE IMMERSED

25°C

IN 75°C OIL BATH

–10

0

10

20

30

40

50

–60 –40 –20

0

20

40

60

80

100 120 140

TIME (s)

TEMPERATURE (°C)

Figure 7. Output Change Due to Thermal Shock

Figure 10. Normalized Line Regulation vs. Temperature

Rev. F | Page 8 of 16

REF02

0.03

0.02

0.01

0

30

25

20

15

10

5

T

= 25°C

A

V

= 15V

IN

0

5

10

15

20

25

30

–60 –40 –20

0

20

40

60

80

100 120 140

INPUT VOLTAGE (V)

TEMPERATURE (°C)

Figure 11. Line Regulation vs. Input Voltage

Figure 13. Maximum Load Current vs. Temperature

1.3

1.2

1.1

1.0

0.9

0.8

0.7

V

= 15V

IN

–60 –40 –20

0

20

40

60

80

100 120 140

TEMPERATURE (°C)

Figure 12 Quiescent Current vs. Temperature

Rev. F | Page 9 of 16

REF02

OUTPUT ADJUSTMENT

V

+2.5V

+

O

The REF02 trim terminal can be used to adjust the output

voltage over a 5 V ±300 mV range. This feature lets the system

designer trim system errors by setting the reference to a voltage

other than 5 V. The output also can be set to exactly 5.000 V or

to 5.12 V for binary applications.

+5V

2

R1

5.6kΩ

6

REF02

V

REF

R2

5.6kΩ

7

2

3

–

4

15V

2

6

OP02

+

R

2

R + R

1 2

1

4

(V

),

V – =

O

(V

)

V

+ =

REF

V

O

IN

R

+ R

1

2

6

5

V

OUTPUT

O

–9V

+V

–2.5V

O

REF02

Figure 17. 2.5 V Reference

3

TRIM

GND

10kΩ

TEMP

TEMPERATURE MONITORING

4

As described previously, the REF02 provides a TEMP output

(Pin 3) that varies linearly with temperature. This output can be

used to monitor the temperature change in the system. The

voltage at V_TEMPis approximately 550 mV at 25°C, and the

temperature coefficient is approximately 1.9± mV/°C (see

Figure 18).

Figure 14. Output Adjustment Circuit

Adjustment of the output does not significantly affect the

temperature performance of the device. The temperature

coefficient change is approximately 0.7 ppm/°C for 100 mV of

output adjustment.

850

V

= 9V

IN

SAMPLE SIZE = 6

+18V

2

800

750

700

650

600

550

500

450

400

V

IN

Z PACKAGE AND 833 PRODUCT

T = 2.1mV/°C

∆

V

/∆

TEMP

REF02

GND

4

∆V

/

∆T = 1.96mV/°C

TEMP

–18V

J, S, AND P PACKAGES

Figure 15. Burn-In Circuit

+15V

2

–50

–25

0

25

50

75

100

125

TEMPERATURE (°C)

V

IN

+5V

6

5

V

O

Figure 18. Voltage at TEMP Pin vs. Temperature

REF02

10kΩ

A voltage change of 39.2 mV at the TEMP pin corresponds to a

20°C change in temperature.

3

TEMP TRIM

GND

10kΩ

+15V

4

The TEMP function is provided as a convenience rather than a

precise feature. Since the voltage at the TEMP node is acquired

from the band gap core, current pulling from this pin will have

a significant effect on V_OUT. Care must be taken to buffer the

TEMP output with a suitable low bias current op amp, such as

the AD8±01, AD820, or OP1177 (all of which would result in

less than a 100 V change in ΔV_OUT) See Figure 19. Without

buffering, even tens of microamps drawn from the TEMP pin

can cause V_OUTto fall out of specification.

0.1µF

–5V

OP02

5kΩ

–15V

Figure 16. 5 V Reference

Rev. F | Page 10 of 16

REF02

27V TO 55V

2

U1

15V

REF02

V

IN

15V

V

O

IN

OUT

6

5

V

O

TEMP

V+

TRIM

GND

V

TEMP

1.9mV/°C

REF02

OP1177

V–

U2

10kΩ

TRIM

GND

4

2

Figure 19. Temperature Monitoring

10V

V

6

5

IN

V

O

REF02

V+ (12V TO 32V)

TRIM

GND

10kΩ

2

R7

27kΩ

5V

4

V

6

IN

V

O

2

R1

R6

REF02

V

(9.2kΩ)

IN

2

3

6

3

8

R

B

6.8kΩ

+

5

V

O

V+

TRIM

10kΩ

7

R3

(1.3kΩ)

HEATING

ELEMENT

V–

4

REF02

CMP02

–

GND

4

TEMP

1

GND

R2

1.5kΩ

4

(SEE NOTE 1)

Figure 21. Reference Stack

PRECISION CURRENT SOURCE

R5

2.2kΩ

R4

2.7kΩ

A current source with 35 V output compliance and excellent

output impedance can be obtained using this circuit. REF02

keeps the line voltage and power dissipation constant in device;

the only important error consideration at room temperature is

the negative supply rejection of the op amp. The typical 3 µV/V

PSRR of the OP02E will create a 20 ppm change (3 µV/V ×

35 V/5 V) in output current over a 25 V range. For example, a

5 mA current source can be built (R = 1 kΩ) with 350 MΩ

output impedance.

NOTES

1. REF02 SHOULD BE THERMALLY CONNECTED

TO SUBSTANCE BEING HEATED.

2. NUMBERS IN PARENTHESES ARE FOR A

SETPOINT TEMPERATURE OF 60°C.

3. R3 = R1 R2 R6

||

Figure 20. Temperature Controller

REFERENCE STACK WITH EXCELLENT LINE

REGULATION

+50V

Two REF01s and one REF02 can be stacked to yield 5.000 V,

15.000 V, and 25.000 V outputs. An additional advantage is

near-perfect line regulation of the 5.0 V and 15.0 V output. A 27

V to 55 V input change produces an output change that is less

than the noise voltage of the devices. A load bypass resistor

(RB) provides a path for the supply current (I_SY) of the 15.000 V

regulator.

35V

–6

R

=

2

O

20

×

10

× 5mA

V

IN

6

V

O

REF02

2

GND

4

2

V

IN

6

V

O

In general, any number of REF01s and REF02s can be stacked

this way. For example, 10 devices will yield 10 outputs in 5 V or

10 V steps. The line voltage can change from 100 V to 130 V.

However, care must be taken to ensure that the total load

currents do not exceed the maximum usable current (typically

21 mA).

REF02

R

C

(TRIM FOR

CALIBRATION)

1

GND

4

R

C

7

2

3

6

V

= 0V

O

OP02E

4

TO 25V

5V

I

=

R

O

–5V

Figure 22. Precision Current Source

Rev. F | Page 11 of 16

REF02

15V

2

+7.5V (±10%)

+7.5V

2

V

IN

6

5

V

V (+) = +3V

O

V

O

R1

20kΩ

REF02HJ

REF02

5V

R

3

I

= +

+ 1mA

OUT

TEMP

TRIM

R

GND

4

R2

13.3kΩ

GND

1/2 OP04CK

A1

4

VOLTAGE COMPLIANCE: –25V TO +8V

–7.5V

I

OUT

Figure 23. Current Source

V

(–) = –3V

A2

1/2 OP04CK

O

I

OUT

R4

2kΩ

R3

1kΩ

VOLTAGE COMPLIANCE: –9V TO +25V

6

2

V

IN

V

–7.5V (±10%)

O

REF02

Figure 26. 3 V Reference

5V

R

3

5

I

= +

+ 1mA

OUT

TEMP

TRIM

R

SUPPLY BYPASSING

GND

4

For best results, it is recommended that the power supply pin be

bypassed with a 0.1 µF disc ceramic capacitor.

–15V

Figure 24. Current Sink

5kΩ

+15V

5kΩ

LSB

MSB

+15V

2

B1 B2 B3 B4 B5 B6 B7 B8

l

6

5

4

V

IN

V

O

E

OP02

DAC08

O

2

0.1µF

l

REF02

V

C

LC

V+

V–

GND

4

5kΩ

–15V

+15V

–15V

Figure 25. DAC Reference

Rev. F | Page 12 of 16

REF02

OUTLINE DIMENSIONS

0.055 (1.40)

MAX

0.005 (0.13)

MIN

REFERENCE PLANE

0.5000 (12.70)

MIN

0.1850 (4.70)

0.1650 (4.19)

8

5

0.1000 (2.54)

BSC

0.2500 (6.35) MIN

0.310 (7.87)

0.220 (5.59)

0.1600 (4.06)

0.1400 (3.56)

0.0500 (1.27) MAX

PIN 1

1

4

5

6

8

4

0.0450 (1.14)

0.0270 (0.69)

0.100 (2.54) BSC

0.405 (10.29) MAX

0.2000

(5.08)

BSC

0.320 (8.13)

0.290 (7.37)

3

7

0.060 (1.52)

0.015 (0.38)

2

0.200 (5.08)

MAX

1

0.1000

(2.54)

BSC

0.0190 (0.48)

0.0160 (0.41)

0.150 (3.81)

0.200 (5.08)

0.125 (3.18)

0.0340 (0.86)

0.0280 (0.71)

0.0400 (1.02) MAX

MIN

0.0210 (0.53)

0.0160 (0.41)

0.0400 (1.02)

0.0100 (0.25)

0.015 (0.38)

0.008 (0.20)

0.023 (0.58)

0.014 (0.36)

SEATING

PLANE

45° BSC

15°

0°

0.070 (1.78)

0.030 (0.76)

BASE & SEATING PLANE

COMPLIANT TO JEDEC STANDARDS MO-002AK

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

Figure 27. 8-Lead Ceramic Dual In-Line Package (CERDIP)

Figure 29. 8-Lead Metal Can [TO-99]

Z-Suffix

(Q-8)-

J-Suffix

(H-08)

0.375 (9.53)

0.365 (9.27)

0.355 (9.02)

0.200 (5.08)

0.075 (1.91)

REF

0.100 (2.54)

0.064 (1.63)

0.100 (2.54) REF

8

1

5

4

0.295 (7.49)

0.285 (7.24)

0.275 (6.98)

0.095 (2.41)

0.015 (0.38)

MIN

0.075 (1.90)

3

19

18

20

4

8

0.028 (0.71)

0.022 (0.56)

0.325 (8.26)

0.310 (7.87)

0.300 (7.62)

1

0.358 (9.09)

0.342 (8.69)

SQ

0.358

0.011 (0.28)

(9.09)

MAX

SQ

BOTTOM

VIEW

0.100 (2.54)

BSC

0.007 (0.18)

R TYP

0.150 (3.81)

0.135 (3.43)

0.120 (3.05)

0.050 (1.27)

BSC

14

0.075 (1.91)

13

9

0.015

(0.38)

MIN

0.180

(4.57)

MAX

REF

45° TYP

0.088 (2.24)

0.054 (1.37)

0.055 (1.40)

0.045 (1.14)

0.150 (3.81)

BSC

0.015 (0.38)

0.010 (0.25)

0.008 (0.20)

0.150 (3.81)

0.130 (3.30)

0.110 (2.79)

0.022 (0.56)

0.018 (0.46)

0.014 (0.36)

SEATING

PLANE

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

0.060 (1.52)

0.050 (1.27)

0.045 (1.14)

Figure 30. 20-Terminal Ceramic Leadless Chip Carrier (LCC)

RC-Suffix

(E-20A)

COMPLIANT TO JEDEC STANDARDS MO-095AA

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

Figure 28. 8-Lead Plastic Dual In-Line Package (PDIP)

P-Suffix

(N-8)

Rev. F | Page 13 of 16

REF02

OUTLINE DIMENSIONS

5.00 (0.1968)

4.80 (0.1890)

8

1

5

4

6.20 (0.2440)

5.80 (0.2284)

4.00 (0.1574)

3.80 (0.1497)

1.27 (0.0500)

BSC

0.50 (0.0196)

0.25 (0.0099)

× 45°

1.75 (0.0688)

1.35 (0.0532)

0.25 (0.0098)

0.10 (0.0040)

8°

0.51 (0.0201)

0.31 (0.0122)

0° 1.27 (0.0500)

COPLANARITY

0.10

0.25 (0.0098)

0.17 (0.0067)

SEATING

PLANE

0.40 (0.0157)

COMPLIANT TO JEDEC STANDARDS MS-012AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

Figure 31. 8-Lead Standard Small Outline Package (SOIC)

Narrow Body

S-Suffix

(R-8)

Rev. F | Page 14 of 16

REF02

ORDERING GUIDE

T_A= 25°C

Operating Temperature

Range (°C )¹

Model

∆V_OSMax (mV)

Package Description

TO-99

Package Option

REF02AJ/883C²

15

25

50

15

25

50

25

50

25

100

25

–55°C to +125

–40°C to +85

–55°C to +125

–40°C to +85

0°C to 70

–55°C to +125

–40°C to +85

–55°C to +125

–40°C to +85

0°C to 70

–40°C to +85

0°C to 70

J-8

REF02EJ

REF02J

REF02HJ

REF02CJ

REF02AZ

REF02AZ/883C²

REF02EZ

REF02Z

REF02HZ

REF02CZ

REF02HP

REF02CP

REF02CS³

REF02CS-REEL

REF02CSZ-REEL⁴

REF02CS-REEL7

REF02HS

REF02HSZ⁴

REF02DP

REF02RC/883²

TO-99

J-8

CERDIP-8

PDIP-8

SOIC-8

Z-8

P-8

S-8

P-8

RC-20

SOIC-8

PDIP-8

–55°C to +125

LCC-20

¹Burn-in is available on commercial and industrial temperature range parts in CERDIP, PDIP, and TO-can packages.

²For devices processed in total compliance to MIL-STD-883, add 883 after part number. Consult factory for 883 data sheet.

³For availability and burn-in information on SOIC package, contact your local sales office.

⁴Z = Pb-free part.

Rev. F | Page 15 of 16

REF02

NOTES

registered trademarks are the property of their respective owners.

C00375-0-7/04(F)

Rev. F | Page 16 of 16

型号:	REF02RC/883
生命周期：	Obsolete
IHS 制造商：	TELCOM SEMICONDUCTOR INC
Reach Compliance Code：	unknown
风险等级：	5.62
Base Number Matches：	1

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