Revision 1.16 – July 19, 2006
440GR – PPC440GR Embedded Processor
Preliminary Data Sheet
Table 7. Signal Functional Description (Sheet 5 of 8)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to 3.3V)
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to 3.3V)
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes
External Master Peripheral Interface
Bus Request. Used when the PPC440GR needs to regain
control of peripheral interface from an external master.
BusReq
ExtAck
O
O
I
Multiplex
Multiplex
External Acknowledgement. Used by the PPC440GR to
indicate that a data transfer occurred.
External Request. Used by an external master to indicate it is
prepared to transfer data.
ExtReq
ExtReset
HoldAck
HoldReq
HoldPri
Multiplex
1, 4
Peripheral Reset. Used by an external master and by
synchronous peripheral slaves.
O
O
I
3.3V LVTTL
Multiplex
Hold Acknowledge. Used by the PPC440GR to transfer
ownership of peripheral bus to an external master.
Hold Request. Used by an external master to request
ownership of the peripheral bus.
Multiplex
1, 5
Hold Primary. Used by an external master to indicate the
priority of a given external master tenure.
I
Multiplex
Peripheral Clock. Used by an external master and by
synchronous peripheral slaves.
PerClk
O
3.3V LVTTL
UART Peripheral Interface
Serial clock input that provides an alternative to the internally
generated serial clock. Used in cases where the allowable
internally generated clock rates are not satisfactory.
UARTSerClk
I
3.3V LVTTL
1, 4
UARTn_Rx
UART Receive data.
I
O
I
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
1, 4
UARTn_Tx
UART Transmit data.
4
UARTn_DCD
UARTn_DSR
UARTn_CTS
UARTn_DTR
UARTn_RTS
UARTn_RI
UART Data Carrier Detect.
UART Data Set Ready.
UART Clear To Send.
UART Data Terminal Ready.
UART Request To Send.
UART Ring Indicator.
6
6
I
I
1, 4, 6
4
O
O
I
4
1, 4
IIC Peripheral Interface
IIC0SClk
IIC0 Serial Clock.
IIC0 Serial Data.
IIC1 Serial Clock.
IIC1 Serial Data.
I/O
I/O
I/O
I/O
3.3V LVTTL
3.3V LVTTL
Multiplex
1, 2
1, 2
IIC0SData
IIC10SClk
IIC1SData
Multiplex
54
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
