Revision 1.16 – July 19, 2006
440GR – PPC440GR Embedded Processor
Preliminary Data Sheet
Device Characteristics
Table 8. Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only.
Operation at or beyond these maximum ratings can cause
permanent damage to the device. None of the performance specification contained in this document are guaranteed when
operating at these maximum ratings.
Characteristic
Supply Voltage (Internal Logic)
Supply Voltage (I/O, except SDRAM, Ethernet)
Supply Voltage (SDRAM, Ethernet)
PLL Supply Voltage
SDRAM PLL Supply Voltage
Input Voltage (3.3V LVTTL receivers)
Storage Temperature Range
Case temperature under bias
Notes:
1. If OV
DD
≤
0.4V, it is required that V
DD
≤
0.4V. Supply excursions not meeting this criteria must be limited to less than 25ms duration
during each power up or power down event.
2. The analog voltages used for the on-chip PLLs can be derived from the logic voltage, but must be filtered before entering the
PPC440GR. A separate filter, as shown below, is recommended for each voltage:
V
DD
L
L – SMT ferrite bead chip, Murata BLM31A700S
AV
DD,
SAV
DD
Symbol
V
DD
OV
DD
SV
DD
AV
DD
SAV
DD
V
IN
T
STG
T
C
Value
0 to +1.65
0 to +3.6
0 to +2.7
0 to +1.65
0 to +1.65
0 to +3.6
-55 to +150
-40 to +120
Unit
V
V
V
V
V
V
°C
°C
3
2
2
Notes
1
1
C
C – 0.1
μ
F ceramic
3. This value is not a specification of the operational temperature range, it is a stress rating only.
58
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
