SPECIFICATIONS
Typical at 25°C, AV
DD
= +5V, DV
DD
= +3.3V, f
tx
= 584kHz (E1 rate), unless otherwise noted.
AFE1124E
PARAMETER
RECEIVE CHANNEL
Number of Inputs
Input Voltage Range
Common-Mode Voltage
Input Impedance All Inputs
Input Capacitance
Input Gain Matching
Resolution
Programmable Gain
Settling Time for Gain Change
Gain + Offset Error
Output Data Coding
Output Symbol Rate, rxSYNC
(3)
Output Bit Rate, rxSYNC
(3)
TRANSMIT CHANNEL
Transmit Clock Rate, f
tx
T1 Transmit –3dB Point
T1 Rate Power
(4, 5)
E1 Transmit –3dB Point
E1 Transmit Power
(4, 5)
Pulse Output
Common-Mode Voltage, V
CM
Output Resistance
(6)
TRANSCEIVER PERFORMANCE
Uncancelled Echo
(5)
COMMENTS
Differential
Balanced Differential
(1)
MIN
2
±3.0
AV
DD
/2
See Typical Performance Curves
10
±2
14
0
+12
6
5
32
64
Symbol Rate
ETSI RTR/TM – Compliant
See Test Method Section, txBoost = 0
ETSI RTR/TM – Compliant
See Test Method Section, txBoost = 0
32
196
13
292
13
14
See Typical Performance Curves
AV
DD
/2
1
–71
–71
–74
–76
–78
–80
–68.5
–68.5
–71
–73.5
–75.5
–77.5
14
584
1168
584
V
V
pF
%
Bits
dB
Symbol Periods
%FSR
(2)
kHz
kbits/sec
kHz
kHz
dBm
kHz
dBm
V
Ω
dB
dB
dB
dB
dB
dB
TYP
MAX
UNITS
Line Input vs Hybrid Input
0dB, 3dB, 6dB, 9dB and 12dB
Tested at Each Gain Range
Two’s Complement
DC to 1MHz
rxGAIN = 0dB, Loopback Enabled
rxGAIN = 0dB, Loopback Disabled
rxGAIN = 3dB, Loopback Disabled
rxGAIN = 6dB, Loopback Disabled
rxGAIN = 9dB, Loopback Disabled
rxGAIN = 12dB, Loopback Disabled
DIGITAL INTERFACE
(6)
Logic Levels
V
IH
V
IL
V
OH
V
OL
t
rx1
Interface
POWER
Analog Power Supply Voltage
Analog Power Supply Voltage
Digital Power Supply Voltage
Digital Power Supply Voltage
Power Dissipation
(4, 5)
Power Dissipation
(4, 5)
PSRR
TEMPERATURE RANGE
Operating
(6)
|I
IH
| < 10µA
|I
IL
| < 10µA
I
OH
= –20µA
I
OL
= 20µA
DV
DD
–1
–0.3
DV
DD
–0.5
9
DV
DD
+0.3
+0.8
+0.4
14
5
V
V
V
V
ns
V
V
V
V
mW
mW
dB
°C
Specification
Operating Range
Specification
Operating Range
AV
DD
= 5V, DV
DD
= 3.3V,
AV
DD
= DV
DD
= 5V
4.75
3.3
3.15
250
300
55
–40
5.25
5.25
+85
NOTES: (1) With a balanced differential signal, the positive input is 180° out of phase with the negative input, therefore the actual voltage swing about the common-
mode voltage on each pin is
±1.5V
to achieve a total input range of
±3.0V
or 6Vp-p. (2) FSR is Full-Scale Range. (3) The output data is available at twice the symbol
rate with interpolated values. (4) With a pseudo-random equiprobable sequence of HDSL pulses; 13.5dBm applied to the transformer (16.5dBm output from txLINEP
and txLINEN). (5) See the Discussion of Specifications section of this data sheet for more information. (6) Guaranteed by design and characterization.
®
AFE1124
2
BURR-BROWN [ BURR-BROWN CORPORATION ]
