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CY7C4211-15AC 参数 Datasheet PDF下载

CY7C4211-15AC图片预览
型号: CY7C4211-15AC
PDF下载: 下载PDF文件 查看货源
内容描述: 的64/256 / 512 / 1K / 2K / 4K / 8K ×9同步FIFO的 [64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs]
分类和应用: 先进先出芯片
文件页数/大小: 19 页 / 547 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7C4421/4201/4211/4221
CY7C4231/4241/4251
Switching Waveforms
(continued)
Programmable Almost Full Flag Timing
Note
t
CLKH
WCLK
t
CLKL
t
ENS
t
ENH
WEN1
WEN2
(if applicable)
t
ENS
t
ENH
PAF
FULL
M+1 WORDS
IN FIFO
Note
t
PAF
FULL
M WORDS
IN FIFO
t
SKEW2
t
PAF
RCLK
t
ENS
REN1,
REN2
t
ENS
t
ENH
Write Programmable Registers
t
CLK
t
CLKH
WCLK
t
ENS
WEN2/LD
t
ENS
WEN1
t
DS
D
0
–D
8
PAE OFFSET
LSB
PAE OFFSET
MSB
PAF OFFSET
LSB
PAF OFFSET
MSB
t
DH
t
ENH
t
CLKL
Notes:
25. If a Write is performed on this rising edge of the Write clock, there will be Full – (m – 1) words of the FIFO when PAF goes LOW.
26. PAF offset = m.
27. 64-m words for CY7C4421, 256 – m words in FIFO for CY7C4201, 512 – m words for CY7C4211, 1024 – m words for CY7C4221, 2048 – m words for CY7C4231,
4096 – m words for CY7C4241, 8192 – m words for CY7C4251.
28. t
SKEW2
is the minimum time between a rising RCLK edge and a rising WCLK edge for PAF to change during that clock cycle. If the time between the rising edge
of RCLK and the rising edge of WCLK is less than t
SKEW2
, then PAF may not change state until the next WCLK.
Document #: 38-06016 Rev. *C
Page 13 of 19