Etr onTech
•
4Mx16 DDR SDRAM
EM658160
CAS Latency Field (A6~A4)
This field specifies the number of clock cycles from the assertion of the Read command to the
first read data. The minimum whole value of CAS Latency depends on the frequency of CK.
The minimum whole value satisfying the following formula must be programmed into this field.
t
CAC
(min)
≤
CAS Latency X t
CK
A6
0
0
0
1
1
1
A5
0
1
1
0
1
1
A4
0
0
1
1
0
1
CAS Latency
Reserved
2 clocks
3 clocks
Reserved
2.5 clocks
Reserved (3.5 clocks)
•
Test Mode field (A8~A7)
These two bits are used to enter the test mode and must be programmed to "00" in normal
operation.
A8
0
1
X
A7
0
0
1
BS0
0
1
Test Mode
Normal mode
DLL Reset
Test mode
An ~ A0
MRS Cycle
Extended Functions (EMRS)
•
( BS0, BS1)
BS1
RFU
RFU
Extended Mode Register Set (EMRS)
BS1
RFU
RFU
BS0
1
1
A11~ A1
RFU
RFU
A0
0
1
DLL Enable
DLL Disable
Etron Confidential
7
Rev. 1.1
Jan. 2002
ETRON [ ETRON TECHNOLOGY, INC. ]
