Features
3
Features
For a detailed feature list see the MCF5275 Reference Manual (MCF5275RM).
4
Signal Descriptions
This section describes signals that connect off chip, including a table of signal properties. For a more
detailed discussion of the MCF5275 signals, consult the MCF5275 Reference Manual (MCF5275RM).
Table 2 lists the signals for the MCF5275 in functional group order. The “Dir” column is the direction for
the primary function of the pin. Refer to Section 6, “Mechanicals/Pinouts,” for package diagrams.
NOTE
In this table and throughout this document a single signal within a group is
designated without square brackets (i.e., A24), while designations for
multiple signals within a group use brackets (i.e., A[23:21]) and is meant to
include all signals within the two bracketed numbers when these numbers
are separated by a colon.
NOTE
The primary functionality of a pin is not necessarily its default functionality.
Pins that are muxed with GPIO will default to their GPIO functionality.
Table 2. MCF5274 and MCF5275 Signal Information and Muxing
MCF5274
MCF5275
MCF5274L
MCF5275L
Signal Name
GPIO
Alternate1 Alternate2 Dir.1
256 MAPBGA 196 MAPBGA
Reset
RESET
—
—
—
—
—
—
I
N15
N14
K12
L12
RSTOUT
O
Clock
EXTAL
XTAL
—
—
—
—
—
—
—
—
—
I
L16
M16
T12
M14
N14
P9
O
O
CLKOUT
Mode Selection
CLKMOD[1:0]
RCON
—
—
—
—
—
—
I
I
N13, P13
P8
M11, N11
M6
External Memory Interface and Ports
PADDR[7:5] CS[6:4] A11, B11, C11
A[23:21]
—
O
A8, B8, C8
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 2
Freescale Semiconductor
4
Preliminary—Subject to Change Without Notice
FREESCALE [ Freescale ]
