Signal Descriptions
Table 2. MCF5274 and MCF5275 Signal Information and Muxing (continued)
Signal Name
GPIO
Alternate1
Alternate2 Dir.
1
MCF5274
MCF5275
256 MAPBGA
A12, B12, C12,
A13, B13, C13,
A14, B14, C14,
B15, C15, B16,
C16, D14, D15,
E14:16, F14:16
M1, N1, N2, N3,
P1, P2, R1, R2,
P3, R3, T3, N4,
P4, R4, T4, N5
M3, R5
K1
L13
T8
P7
D16
G16
L4
P6
MCF5274L
MCF5275L
196 MAPBGA
B9, D9, C9,
C10, B10, A11,
C11, B11, A12,
D11, C12, B13,
C13, D12, E11,
D13, E12, F11,
D14, E13, F13
J3, L1, K2, K3,
M1, L2, L3, L4,
K4, J4, M2, N1,
N2, M3, M4, N3
K1, L5
H4
K14
—
L6
B14
E14
H2
—
A[20:0]
—
—
—
O
D[31:16]
—
—
—
O
BS[3:2]
OE
TA
TEA
R/W
TSIZ1
TSIZ0
TS
TIP
PBS[3:2]
PBUSCTL[7]
PBUSCTL[6]
PBUSCTL[5]
PBUSCTL[4]
PBUSCTL[3]
PBUSCTL[2]
PBUSCTL[1]
PBUSCTL[0]
CAS[3:2]
—
—
DREQ1
—
DACK1
DACK0
DACK2
DREQ0
—
—
—
—
—
—
—
—
—
O
O
I
I
O
O
O
O
O
Chip Selects
CS[7:1]
PCS[7:1]
—
—
O
D10:13, E13,
F13, N7
R6
D8, A9, A10,
D10, B12, C14,
P4
N5
CS0
—
—
—
O
DDR SDRAM Controller
DDR_CLKOUT
DDR_CLKOUT
SD_CS[1:0]
SD_SRAS
SD_SCAS
SD_WE
SD_A10
SD_DQS[3:2]
SD_CKE
SD_VREF
—
—
PSDRAM[7:6]
PSDRAM[5]
PSDRAM[4]
PSDRAM[3]
—
PSDRAM[2:1]
PSDRAM[0]
—
—
—
CS[3:2]
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
O
O
O
O
O
O
O
I/O
O
I
T7
T6
M2, T5
L2
L1
K2
N6
M4, P5
L3
A15, T2
P6
P5
H3, M5
H1
G3
G4
N4
J2, P3
J1
A13, P2
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 2
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
5
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
