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JS28F512P30TF 参数 Datasheet PDF下载

JS28F512P30TF图片预览
型号: JS28F512P30TF
PDF下载: 下载PDF文件 查看货源
内容描述: 美光并行NOR闪存的嵌入式存储器( P30-65nm ) [Micron Parallel NOR Flash Embedded Memory (P30-65nm)]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 92 页 / 1225 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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512Mb, 1Gb, 2Gb: P30-65nm
Configuration Register
Configuration Register
Read Configuration Register
The read configuration register (RCR) is a 16-bit read/write register used to select bus
read mode (synchronous or asynchronous) and to configure device synchronous burst
read characteristics. To modify RCR settings, use the CONFIGURE READ CONFIGURA-
TION REGISTER command. RCR contents can be examined using the READ DEVICE
IDENTIFIER command and then reading from offset 0x05. On power-up or exit from re-
set, the RCR defaults to asynchronous mode. RCR bits are described in more detail be-
low.
Note:
Reading the configuration register is a nonarray READ operation. When the oper-
ation occurs in asynchronous page mode, only the first data is valid, and all subsequent
data are undefined. When the operation occurs in synchronous burst mode, the same
word of data requested will be output on successive clock edges until the burst length
requirements are satisfied.
Table 13: Read Configuration Register
Bits
15
Name
Read mode (RM)
Settings/Description
0 = Synchronous burst mode read
1 = Asynchronous page mode read (default)
0000 = Code 0 (reserved)
0001 = Code 1 (reserved)
0010 = Code 2 (reserved)
0011 = Code 3
0100 = Code 4
0101 = Code 5
0110 = Code 6
0111 = Code 7
1000 = Code 8
1001 = Code 9
1010 = Code 10
1011 = Code11
1100 = Code 12
1101 = Code 13
1110 = Code 14
1111 = Code 15 (default)
14:11 Latency count
(LC[3:0])
10
9
8
7
6
5:4
3
2:0
WAIT polarity (WP)
Reserved (R)
WAIT delay (WD)
Burst sequence (BS)
Clock edge (CE)
Reserved (R)
Burst wrap (BW)
0 = WAIT signal is active LOW (default)
1 = WAIT signal is active HIGH
Default 0, Nonchangeable
0 = WAIT de-asserted with valid data
1 = WAIT de-asserted one data cycle before valid data (default)
Default 0, Nonchangeable
0 = Falling edge
1 = Rising edge (default)
Default 0, Nonchangeable
0 = Wrap; Burst accesses wrap within burst length set by BL[2:0]
1 = No Wrap; Burst accesses do not wrap within burst length (default)
011 = 16-word burst
111 = Continuous burst (default)
(Other bit settings are reserved)
Burst length (BL[2:0]) 001 = 4-word burst
010 = 8-word burst
Read Mode
The read mode (RM) bit selects synchronous burst mode or asynchronous page mode
operation for the device. When the RM bit is set, asynchronous page mode is selected
(default). When RM is cleared, synchronous burst mode is selected.
PDF: 09005aef845667b3
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN
39
Micron Technology, Inc. reserves the right to change products or specifications without notice.
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2013 Micron Technology, Inc. All rights reserved.