Micron M25P40 Serial Flash Embedded Memory
SPI Modes
SPI Modes
These devices can be driven by a microcontroller with its serial peripheral interface
(SPI) running in either of the following two SPI modes:
• CPOL=0, CPHA=0
• CPOL=1, CPHA=1
For these two modes, input data is latched in on the rising edge of serial clock (C), and
output data is available from the falling edge of C.
The difference between the two modes is the clock polarity when the bus master is in
STANDBY mode and not transferring data:
• C remains at 0 for (CPOL=0, CPHA=0)
• C remains at 1 for (CPOL=1, CPHA=1)
Figure 3: SPI Modes Supported
CPOL
CPHA
0
0
C
1
1
C
DQ0
MSB
DQ1
MSB
Because only one device is selected at a time, only one device drives the serial data out-
put (DQ1) line at a time, while the other devices are HIGH-Z. An example of three devi-
ces connected to an MCU on an SPI bus is shown here.
PDF: 09005aef8456654f
m25p40.pdf - Rev. Y 8/12 EN
9
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