欢迎访问ic37.com |
会员登录 免费注册
发布采购

S25FL032A0LMFI001 参数 Datasheet PDF下载

S25FL032A0LMFI001图片预览
型号: S25FL032A0LMFI001
PDF下载: 下载PDF文件 查看货源
内容描述: 32兆位CMOS 3.0伏闪存与50MHz的SPI (串行外设接口)总线 [32 Megabit CMOS 3.0 Volt Flash Memory with 50MHz SPI (Serial Peripheral Interface) Bus]
分类和应用: 闪存
文件页数/大小: 36 页 / 944 K
品牌: SPANSION [ SPANSION ]
 浏览型号S25FL032A0LMFI001的Datasheet PDF文件第23页浏览型号S25FL032A0LMFI001的Datasheet PDF文件第24页浏览型号S25FL032A0LMFI001的Datasheet PDF文件第25页浏览型号S25FL032A0LMFI001的Datasheet PDF文件第26页浏览型号S25FL032A0LMFI001的Datasheet PDF文件第28页浏览型号S25FL032A0LMFI001的Datasheet PDF文件第29页浏览型号S25FL032A0LMFI001的Datasheet PDF文件第30页浏览型号S25FL032A0LMFI001的Datasheet PDF文件第31页  
D a t a S h e e t ( P r e l i m i n a r y )  
9.12 Release from Deep Power Down (RES)  
The device requires the Release from Deep Power Down (RES) command to exit the Deep Power Down  
mode. When the device is in the Deep Power Down mode, all commands except RES are ignored.  
The host system must drive CS# low and write the RES command to SI. CS# must be driven low for the entire  
duration of the sequence. The command sequence is shown in Figure 9.12 and Table 9.4.  
The host system must drive CS# high tRES(max) after the 8-bit RES command byte. The device transitions  
from DP mode to the standby mode after a delay of tRES (see Table 16.1 on page 30). In the standby mode,  
the device can execute any read or write command.  
Figure 9.12 Release from Deep Power Down (RES) Command Sequence  
CS#  
7
0
2
3
5
1
4
6
Mode 3  
SCK  
Mode 0  
tRES  
Command  
SI  
Hi-Z  
SO  
Deep Power-down Mode  
Standby Mode  
September 1, 2006 S25FL032A_00_C0  
S25FL032A  
25