Da ta
Shee t
(Prelimi nar y)
9.10
Bulk Erase (BE)
The Bulk Erase (BE) command sets all the bits within the entire memory array to logic 1s. A WREN command
is required prior to writing the PP command.
The host system must drive CS# low, and then write the BE command on SI. CS# must be driven low for the
entire duration of the BE sequence. The command sequence is shown in
and
The host system must drive CS# high after the device has latched the 8th bit of the CE command, otherwise
the device does not execute the command. The BE operation begins as soon as CS# is driven high. The
device internally controls the timing of the operation, which requires a period of t
BE
. The Status Register may
be read to check the value of the Write In Progress (WIP) bit while the BE operation is in progress. The WIP
bit is 1 during the BE operation, and is 0 when the operation is completed. The device internally resets the
Write Enable Latch to 0 before the operation completes (the exact timing is not specified).
The device only executes a BE command if all Block Protect bits (BP2:BP0) are 0 (see
Otherwise, the device ignores the command.
Figure 9.10
Bulk Erase (BE) Command Sequence
CS#
Mode
3
0
1
2
3
4
5
6
7
SCK
Mode 0
Command
SI
SO
Hi-Z
September 1, 2006 S25FL032A_00_C0
S25FL032A
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