D at a
S hee t
(Adva nce
In for m ation)
Figure 11.15
Alternate CE# Controlled Write (Erase/Program) Operation Timings
555 for program
2AA for erase
PA for program
SA for sector erase
555 for chip erase
Data# Polling
PA
Addresses
t
WC
t
WH
WE#
t
GHEL
OE#
t
CP
CE#
t
WS
t
CPH
t
DS
t
DH
Data
t
RH
A0 for program
55 for erase
PD for program
30 for sector erase
10 for chip erase
t
AS
t
AH
t
WHWH1 or 2
t
BUSY
DQ7#
D
OUT
RESET#
RY/BY#
Notes
1.
indicates last two bus cycles of a program or erase operation.
2. PA = program address, SA = sector address, PD = program data.
3. DQ7# is the complement of the data written to the device. D
OUT
is the data written to the device.
4. Waveforms are for the word mode.
November 21, 2006 S29GL-P_00_A3
S29GL-P MirrorBit
TM
Flash Family
59
SPANSION [ SPANSION ]
