4 Mbit LPC Flash
SST49LF040
Advance Information
TABLE 10: R
ECOMMENDED
S
YSTEM
P
OWER
-
UP
T
IMINGS
Symbol
T
PU-READ
1
Parameter
Power-up to Read Operation
Power-up to Write Operation
Minimum
100
100
Units
µs
µs
T10.0 562
T
PU-WRITE1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter
TABLE 11: P
IN
C
APACITANCE
Parameter
C
I/O1
C
IN
1
(V
DD
=3.3V, Ta=25 °C, f=1 Mhz, other pins open)
Description
I/O Pin Capacitance
Input Capacitance
Test Condition
V
I/O
=0V
V
IN
=0V
Maximum
12 pF
6 pF
T11.0 562
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 12: R
ELIABILITY
C
HARACTERISTICS
Symbol
N
END1
T
DR1
I
LTH1
Parameter
Endurance
Data Retention
Latch Up
Minimum
Specification
10,000
100
100 + I
DD
Units
Cycles
Years
mA
Test Method
JEDEC Standard A117
JEDEC Standard A103
JEDEC Standard 78
T12.0 562
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 13: C
LOCK
T
IMING
P
ARAMETERS
(LPC M
ODE
)
Symbol
T
CYC
T
HIGH
T
LOW
-
-
Parameter
LCLK Cycle Time
LCLK High Time
LCLK Low Time
LCLK Slew Rate (peak-to-peak)
RST# or INIT# Slew Rate
Min
30
11
11
1
50
4
Max
Units
ns
ns
ns
V/ns
mV/ns
T13.0 562
Tcyc
Thigh
0.6 VDD
0.5 VDD
0.4 VDD
0.3 VDD
0.2 VDD
562 ILL F05.0
Tlow
0.4 VDD p-to-p
(minimum)
FIGURE 6: LCLK W
AVEFORM
©2001 Silicon Storage Technology, Inc.
S71213-00-000 11/01 562
18
SST [ SILICON STORAGE TECHNOLOGY, INC ]
