tm
TE
CH
T221160A
FUNCTIONAL BLOCK DIAGRAM
WE
CASL
CASH
CAS
CONTROL
LOGIC
DATA-IN BUFFER
DQ01
16
.
.
DQ16
NO.2 CLOCK
GENERATOR
DATA-
OUT
BUFFER
8
COLUM N.
ADDRESS
BUFFER
8
COLUM N
DECODER
OE
16
A0
A1
A2
A3
A4
A5
A6
A7
8
REFRESH
COUNTER
REFRESH
CONTROLLER
256
8
SENSE AM PLIFIERS
VO GATING
256 x 16
8
ROW
DECODER
8
ROW .
ADDRESS
BUFFERS(8)
8
256
256 x 256 x 16
M EM ORY
ARRA
Y
RAS
NO.1 CLOCK
GENERATOR
Vcc
Vss
PIN DESCRIPTIONS
PIN NO.
16~19,22~25
14
28
29
13
27
2~5,6~10,31~34,36~39
1,6,20
21,35,40
11,12,15,30
SYM.
A0-A7
RAS
CASH
CASL
WE
OE
I/O1 - I/O16
Vcc
Vss
NC
TYPE
Input
Input
Input
Input
Input
Input
Address Input
Row Address Strobe
Column Address Strobe /Upper Byte Control
Column Address Strobe /Lower Byte Control
Write Enable
Output Enable
DESCRIPTION
Input/ Output Data Input/ Output
Supply
Ground
-
Power, 5V
Ground
No Connect
Taiwan Memory Technology, Inc. reserves the right
P. 2
to change products or specifications without notice.
Publication Date: FEB. 2002
Revision:A
TMT [ TAIWAN MEMORY TECHNOLOGY ]
