Production Data
WM8150
SERIAL INTERFACE
t
SPER
SCK
t
SSU
SDI
t
SCE
SEN
t
SERD
ADC DATA
SDO
MSB
REGISTER DATA
LSB
t
SCRD
t
SCRDZ
ADC
DATA
t
SEW
t
SEC
t
SH
t
SCKL
t
SCKH
Figure 3 Serial Interface Timing
Test Conditions
VDD = 5.0, DVDD = 3.3V, AGND = DGND = 0V, T
A
= 25°C, MCLK = 16MHz unless otherwise stated.
PARAMETER
SCK period
SCK high
SCK low
SDI set-up time
SDI hold time
SCK to SEN set-up time
SEN to SCK set-up time
SEN pulse width
SEN low to SDO = Register data
SCK low to SDO = Register data
SCK low to SDO = ADC data
Note:
1.
Parameters are measured at 50% of the rising/falling edge
SYMBOL
t
SPER
t
SCKH
t
SCKL
t
SSU
t
SH
t
SCE
t
SEC
t
SEW
t
SERD
t
SCRD
t
SCRDZ
TEST CONDITIONS
MIN
83.3
37.5
37.5
10
10
20
20
50
35
35
25
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
w
PD Rev 3.0 November 2002
7
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
