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MB89374 参数 Datasheet PDF下载

MB89374图片预览
型号: MB89374
PDF下载: 下载PDF文件 查看货源
内容描述: - 12号的铝制车身绘( RAL 7032 ) []
分类和应用:
文件页数/大小: 45 页 / 328 K
品牌: FUJITSU [ FUJITSU COMPONENT LIMITED. ]
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-22307-5E
ASSP Communication Control
Data Link Controller (DLC)
MB89374
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DESCRIPTION
The MB89374 Data Link Controller (DLC) controls transfer of serial data in accordance with Bit Oriented Protocol
(BOP). It supports protocols such as High level Data Link Control (HDLC) (the BOP mode) and Serial Data
Link Control (SDLC) LOOP secondary station (the LOOP mode).
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FEATURES
Supports BOP serial data transfer procedure
Supports SDLC LOOP mode
Internal full-duplex communications channel
Data transfer at rates up to 2.5 Mbps (at 10 MHz)
However, in the LOOP mode, the maximum transfer rates are 1.25 Mbps for NRZ/NRZI code and 833 kpbs
for FM/Manchester code.
10 MHz system clock with 1/2 duty, or 8 MHz with 1/3 duty
Internal inter frame spacing counter
Receive address field data compared with address data register
One-byte address compare (multicasting address collating)
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Two-byte address compare
One-byte two-address compare
Global address compare
• Supports two type of CRC checks (CRC16/CCITT)
(Continued)
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PACKAGES
42 pin, Plastic SH-DIP
48 pin, Plastic QFP
(FPT-48P-M13)
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that
normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.