GS1559 Data Sheet
4.10.6.6 TRS Error Correction
When TRS error correction and insertion is enabled, the GS1559 will generate and
insert 10-bit TRS code words as required.
TRS word generation will be performed in accordance with the timing parameters
generated by the flywheel to provide an element of noise immunity. As a result,
TRS correction will only take place if the flywheel is enabled, (FW_EN/DIS =
HIGH).
In addition, the TRS_INS bit of the IOPROC_DISABLE register must be set LOW.
4.10.7 EDH Flag Detection
As described in
the GS1559 can detect
EDH packets in the received data stream. The EDH flags for ancillary data, active
picture and full field areas are extracted from the detected EDH packets and placed
in the EDH_FLAG register of the device (Table
One set of flags is provided for both fields 1 and 2. Field 1 flag data will be
overwritten by field 2 flag data.
The EDH_FLAG register may be read by the host interface at any time during the
received frame except on the lines defined in SMPTE RP165 where these flags are
updated.
NOTE 1: By programming the ANC_TYPE1 register (005h) with the DID word for
EDH ancillary packets, the application layer may detect a high-to-low transition on
either the YANC or CANC output pin of the GS1559 to determine (a) when EDH
packets have been received by the device, and (b) when the EDH_FLAG register
can be read by the host interface. See
for more information on ancillary data detection and indication.
NOTE 2: The bits of the EDH_FLAG register are sticky and will not be cleared by
a read operation. If the GS1559 is decoding a source containing EDH packets,
where EDH flags may be set, and the source is replaced by one without EDH
packets, the EDH_FLAG register will not be cleared.
NOTE 3: The GS1559 will detect EDH flags, but will not update the flags if an EDH
CRC error is detected. Gennum's GS1532 Multi-Rate Serializer allows the host to
individually set EDH flags.
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