MSP430G2x52
MSP430G2x12
SLAS722B
–
DECEMBER 2010
–
REVISED MARCH 2011
Device Pinout
PW PACKAGE
(TOP VIEW)
DVCC
P1.0/TA0CLK/ACLK/A0/CA0
P1.1/TA0.0/A1/CA1
P1.2/TA0.1/A2/CA2
P1.3/ADC10CLK/CAOUT/A3/VREF-/VEREF-/CA3
P1.4/TA0.2/SMCLK/A4/VREF+/VEREF+/CA4/TCK
P1.5/TA0.0/SCLK/A5/CA5/TMS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
DVSS
XIN/P2.6/TA0.1
XOUT/P2.7
TEST/SBWTCK
RST/NMI/SBWTDIO
P1.7/SDI/SDA/CAOUT/A7/CA7/TDO/TDI
P1.6/TA0.1/SDO/SCL/A6/CA6/TDI/TCLK
NOTE: ADC10 pin functions are available only on MSP430G2x52.
NOTE: The pulldown resistors of port pins P2.0, P2.1, P2.2, P2.3, P2.4, and P2.5 should be enabled by setting P2REN.x = 1.
RSA PACKAGE
(TOP VIEW)
DVCC
AVCC
DVSS
AVSS
P1.0/TA0CLK/ACLK/A0/CA0
P1.1/TA0.0/A1/CA1
P1.2/TA0.1/A2/CA2
P1.3/ADC10CLK/CAOUT/A3/VREF-/VEREF-/CA3
16 15 14 13
1
12
2
11
3
10
4
9
5 6 7 8
XIN/P2.6/TA0.1
XOUT/P2.7
TEST/SBWTCK
RST/NMI/SBWTDIO
NOTE: ADC10 pin functions are available only on MSP430G2x52.
NOTE: The pulldown resistors of port pins P2.0, P2.1, P2.2, P2.3, P2.4, and P2.5 should be enabled by setting P2REN.x = 1.
N OR PW PACKAGE
(TOP VIEW)
DVCC
P1.0/TA0CLK/ACLK/A0/CA0
P1.1/TA0.0/A1/CA1
P1.2/TA0.1/A2/CA2
P1.3/ADC10CLK/CAOUT/VREF-/VEREF-/A3/CA3
P1.4/TA0.2/SMCLK/A4/VREF+/VEREF+/CA4/TCK
P1.5/TA0.0/SCLK/A5/CA5/TMS
P2.0
P2.1
P2.2
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
NOTE: ADC10 pin functions are available only on MSP430G2x52.
P1.4/SMCLK/A4/VREF+/VEREF+/CA4/TCK
P1.5/TA0.0/SCLK/A5/CA5/TMS
P1.6/TA0.1/SDO/SCL/A6/CA6
/
TDI/TCLK
P1.7/SDI/SDA/CAOUT/A7/CA7/TDO/TDI
DVSS
XIN/P2.6/TA0.1
XOUT/P2.7
TEST/SBWTCK
RST/NMI/SBWTDIO
P1.7/SDI/SDA/CAOUT/A7/CA7/TDO/TDI
P1.6/TA0.1/SDO/SCL/A6/CA6/TDI/TCLK
P2.5
P2.4
P2.3
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