R
Spartan-3 FPGA Family: Introduction and Ordering Information
Revision History
Date
04/11/03
04/24/03
12/24/03
07/13/04
01/17/05
Version No.
1.0
1.1
1.2
1.3
1.4
Initial Xilinx release.
Updated block RAM, DCM, and multiplier counts for the XC3S50.
Added the FG320 package.
Added information on Pb-free packaging options.
Referenced Spartan-3 XA Automotive FPGA families in
Added XC3S50CP132,
XC3S2000FG456, XC3S4000FG676 options to
Updated
to show
mask revision code, fabrication facility code, and process technology code.
Added package markings for BGA packages (Figure
3)
and CP132/CPG132 packages
4).
Added differential (complementary single-ended) HSTL and SSTL I/O standards.
Increased number of supported single-ended and differential I/O standards.
Updated document links.
Updated
to allow for dual-marking.
Added XC3S5000 FG(G)676 to
Noted that FG(G)1156 package is being discontinued
and updated max I/O count.
Updated max I/O counts based on FG1156 discontinuation. Clarified dual mark in
Updated formatting and links.
Description
08/19/05
04/03/06
04/26/06
05/25/07
11/30/07
06/25/08
1.5
2.0
2.1
2.2
2.3
2.4
DS099-1 (v2.4) June 25, 2008
Product Specification
9
XILINX [ XILINX, INC ]
