FDMC510P各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

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产品型号FDMC510P的概述

芯片FDMC510P的概述 FDMC510P是一款由Fairchild Semiconductor（现为意法半导体的一部分）开发的高性能N沟道MOSFET（金属氧化物半导体场效应晶体管）。该芯片主要用于开关电源、DC-DC转换器和其他功率管理应用。由于其优良的电气特性和低导通电阻，该 MOSFET 在消费电子、汽车电子及工业领域得到了广泛应用。芯片FDMC510P的详细参数 FDMC510P MOSFET的主要参数如下： - 最大漏极-源极电压（Vds）：20V - 最大漏极电流（Id）：最大可达到55A（在适当的散热条件下） - 导通电阻（Rds(on)）：10毫欧（@Vgs = 10V时） - 栅极阈值电压（Vgs(th)）：1.0V（最小）至 2.5V（最大） - 输入电容（Ciss）：1600pF（@Vds = 10V时） - 输出电容（Coss）：50pF（@Vds = 1...

产品型号FDMC510P的Datasheet PDF文件预览

June 2010

FDMC510P

P-Channel PowerTrench^®MOSFET

-20 V, -18 A, 8.0 mΩ

Features

General Description

Max r_DS(on)= 8.0 mΩ at V_GS= -4.5 V, I_D= -12 A

Max r_DS(on)= 9.8 mΩ at V_GS= -2.5 V, I_D= -10 A

Max r_DS(on)= 13 mΩ at V_GS= -1.8 V, I_D= -9.3 A

Max r_DS(on)= 17 mΩ at V_GS= -1.5 V, I_D= -8.3 A

High performance trench technology for extremely low r_DS(on)

This P-Channel MOSFET is produced using Fairchild

Semiconductor’s advanced Power Trench^®process that has

been optimized for r_DS(ON), switching performance and

ruggedness.

Applications

High power and current handling capability in a widely used

surface mount package

Battery Management

Load Switch

100% UIL Tested

Termination is Lead-free and RoHS Compliant

HBM ESD capability level >2 KV typical (Note 4)

Bottom

Top

Pin 1

MLP 3.3x3.3

MOSFET Maximum Ratings T_A= 25 °C unless otherwise noted

Symbol

V_DS

V_GS

Parameter

Ratings

Units

Drain to Source Voltage

Gate to Source Voltage

-20

±8

Drain Current -Continuous (Package limited)

-Continuous (Silicon limited)

-Continuous

T_C= 25 °C

_C= 25 °C

-18

-54

I_D

T_A= 25 °C

(Note 1a)

-12

-Pulsed

-50

E_AS

Single Pulse Avalanche Energy

Power Dissipation

T_C= 25 °C

T_A= 25 °C

P_D

Power Dissipation

2.3

T_J, T_STG

Operating and Storage Junction Temperature Range

-55 to +150

°C

Thermal Characteristics

R_θJC

R_θJA

Thermal Resistance, Junction to Case

Thermal Resistance, Junction to Ambient

°C/W

(Note 1a)

Package Marking and Ordering Information

Device Marking

Device

Package

Reel Size

13 ’’

Tape Width

Quantity

FDMC510P

MLP 3.3X3.3

12 mm

3000 units

FDMC510P Rev.C5

www.fairchildsemi.com

Electrical Characteristics T_J= 25 °C unless otherwise noted

Symbol

Parameter

Test Conditions

Min

Typ

Max

Units

Off Characteristics

BV_DSS

Drain to Source Breakdown Voltage

I_D= -250 µA, V_GS= 0 V

-20

∆BV_DSS

∆T_J

Breakdown Voltage Temperature

Coefficient

_D= -250 µA, referenced to 25 °C

-12

mV/°C

I_DSS

I_GSS

Zero Gate Voltage Drain Current

Gate to Source Leakage Current

V_DS= -16 V, V_GS= 0 V

V_GS= ±8 V, V_DS= 0 V

-1

µA

±100

On Characteristics

V_GS(th)

Gate to Source Threshold Voltage

V_GS= V_DS, I_D= -250 µA

-0.4

-0.5

-1.0

∆V_GS(th)

∆T_J

Gate to Source Threshold Voltage

Temperature Coefficient

_D= -250 µA, referenced to 25 °C

V_GS= -4.5 V, I_D= -12 A

_GS= -2.5 V, I_D= -10 A

mV/°C

6.4

7.6

9.2

8.0

9.8

r_DS(on)

Static Drain to Source On Resistance

Forward Transconductance

V_GS= -1.8 V, I_D= -9.3 A

V_GS= -1.5 V, I_D= -8.3 A

V_GS= -4.5 V, I_D= -12 A, T_J= 125 °C

V_DS= -5 V, I_D= -12 A

mΩ

8.5

g_FS

Dynamic Characteristics

C_iss

C_oss

C_rss

Input Capacitance

5910

840

7860

1120

1110

V_DS= -10 V, V_GS= 0 V,

f = 1 MHz

Output Capacitance

Reverse Transfer Capacitance

738

Switching Characteristics

t_d(on)

t_r

t_d(off)

t_f

Turn-On Delay Time

Rise Time

V_DD= -10 V, I_D= -12 A,

_GS= -4.5 V, R_GEN= 6 Ω

Turn-Off Delay Time

Fall Time

338

170

540

272

116

Q_g(TOT)

Q_gs

Total Gate Charge

Gate to Source Charge

Gate to Drain “Miller” Charge

V_GS= 0 V to -4.5 V

V_GS= 0 V to -2.5 V

V_DD= -10 V,

_D= -12 A

6.3

20.4

Q_gd

Drain-Source Diode Characteristics

_GS= 0 V, I_S= -12 A

(Note 2)

-0.70

-0.53

-1.3

-1.2

V_SD

Source to Drain Diode Forward Voltage

V_GS= 0 V, I_S= -2 A

t_rr

Reverse Recovery Time

I_F= -12 A, di/dt = 100 A/µs

Q_rr

Reverse Recovery Charge

Notes:

is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

is guaranteed by design while

R is determined

θJA

θJC

by the user’s board design.

a. 53 °C/W when mounted on

a 1 in pad of 2 oz copper

b. 125 °C/W when mounted on a

minimum pad of 2 oz copper

2: Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.

3: Starting T = 25 C; P-Ch: L = 3 mH, I = -5 A, V = -20 V, V = -4.5 V.

4: No gate overvoltage rating is implied.

FDMC510P Rev.C5

www.fairchildsemi.com

Typical Characteristics T_J= 25 °C unless otherwise noted

PULSE DURATION = 80

µs

V_GS= -1.5 V

DUTY CYCLE = 0.5%MAX

V_GS= -4.5 V

V_GS= -1.2 V

V_GS= -2.5 V

V_GS= -1.8 V

V_GS= -1.5 V

V_GS= -1.8 V

V_GS= -1.2 V

V_GS= -4.5 V

PULSE DURATION = 80

µs

V_GS= -2.5 V

DUTY CYCLE = 0.5%MAX

0.0

0.5

1.0

1.5

2.0

4.5

1.2

-V_DSDRAIN TO SOURCE VOLTAGE (V)

-I_D

, DRAIN CURRENT (A)

Figure 1. On Region Characteristics

Figure2. N o r m a l i z e d O n - R e s i s ta n c e

vs Drain Current and Gate Voltage

1.5

PULSE DURATION = 80 µs

DUTY CYCLE = 0.5%MAX

I_D= -12 A

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

V_GS= -4.5 V

I_D= -12 A

T_J= 125 ^o

T_J= 25 ^o

1.0

-75 -50 -25

T_J

25 50 75 100 125 150

1.5

-V_GS

2.0

2.5

3.0

3.5

4.0

JUNCTION TEMPERATURE ( )

^oC

GATE TO SOURCE VOLTAGE (V)

Figure 3. Normalized On Resistance

vs Junction Temperature

Figure4. On-Resistance vs Gate to

Source Voltage

100

PULSE DURATION = 80 µs

DUTY CYCLE = 0.5%MAX

V_GS= 0 V

V_DS= -5 V

T_J= 150 ^o

T_J= 25 ^o

0.1

T_J= -55 ^o

0.01

0.0

0.5

1.0

1.5

2.0

0.0

0.2

0.4

0.6

0.8

1.0

-V_GS, GATE TO SOURCE VOLTAGE (V)

-V_SD, BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics

Figure6. Source to Drain Diode

Forward Voltage vs Source Current

FDMC510P Rev.C5

www.fairchildsemi.com

Typical Characteristics T_J= 25 °C unless otherwise noted

20000

10000

4.5

I_D= -12 A

C_iss

3.0

V_DD= -12 V

V_DD= -10 V

V_DD= -8 V

1.5

0.0

C_oss

1000

400

f = 1 MHz

= 0 V

C_rss

0.1

100

-V_DS, DRAIN TO SOURCE VOLTAGE (V)

Q_g, GATE CHARGE (nC)

Figure 7. Gate Charge Characteristics

Figure8. C a p a c i t a n c e v s D r a i n

to Source Voltage

V_GS= -4.5 V

T_J= 25 ^o

V_GS= -2.5 V

T_J= 100 ^o

T_J= 125 ^o

R_θJC= 3 ^oC/W

Limited by Package

0.1

100

125

150

100

1000

T_C, CASE TEMPERATURE (^oC)

t_AV, TIME IN AVALANCHE (ms)

Figure9. U n c l a m p e d I n d u c t i v e

Switching Capability

Figure10. Maximum Continuous Drain

Current vs Case Temperature

100

1000

100 us

SINGLE PULSE

R_θJA= 125^oC/W

_A= 25^oC

1 ms

100

10 ms

100 ms

THIS AREA IS

LIMITED BY r

DS(on)

1 s

10 s

SINGLE PULSE

T_J= MAX RATED

R_θJA= 125 ^oC/W

0.1

_A= 25 ^oC

0.01

0.5

10^-4

10^-3

10^-2

t, PULSE WIDTH (sec)

10^-1

100 1000

0.01

0.1

-V_DS, DRAIN TO SOURCE VOLTAGE (V)

Figure 11. Forward Bias Safe

Operating Area

Figure12. SinglePulseMaximum

Power Dissipation

FDMC510P Rev.C5

www.fairchildsemi.com

Typical Characteristics T_J= 25 °C unless otherwise noted

DUTY CYCLE-DESCENDING ORDER

D = 0.5

0.2

0.1

0.05

0.02

0.01

0.1

0.01

NOTES:

DUTY FACTOR: D = t /t

SINGLE PULSE

R_θ_JA= 125 ^oC/W

PEAK T = P

x Z

x R

+ T

θJA

θJA A

0.001

10^-4

10^-3

10^-2

10^-1

t, RECTANGULAR PULSE DURATION (sec)

100

1000

Figure 13. Junction-to-Ambient Transient Thermal Response Curve

FDMC510P Rev.C5

www.fairchildsemi.com

Dimensional Outline and Pad Layout

FDMC510P Rev.C5

www.fairchildsemi.com

TRADEMARKS

The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not

intended to be an exhaustive list of all such trademarks.

AccuPower™

Auto-SPM™

Build it Now™

CorePLUS™

CorePOWER™

CROSSVOLT™

CTL™

F-PFS™

FRFET

Global Power Resource

Green FPS™

Green FPS™ e-Series™

Gmax™

Power-SPM™

PowerTrench

PowerXS™

®*

The Power Franchise

Programmable Active Droop™

QFET

QS™

Quiet Series™

TinyBoost™

TinyBuck™

TinyCalc™

GTO™

Current Transfer Logic™

IntelliMAX™

ISOPLANAR™

MegaBuck™

MICROCOUPLER™

MicroFET™

RapidConfigure™

™

DEUXPEED

TinyLogic

Dual Cool™

TINYOPTO™

TinyPower™

TinyPWM™

EcoSPARK

Saving our world, 1mW/W/kW at a time™

SignalWise™

SmartMax™

EfficentMax™

ESBC™

MicroPak™

TinyWire™

MicroPak2™

MillerDrive™

MotionMax™

Motion-SPM™

OptiHiT™

SMART START™

TriFault Detect™

TRUECURRENT™*

µSerDes™

SPM

STEALTH™

SuperFET™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

SupreMOS™

SyncFET™

Fairchild

Fairchild Semiconductor

FACT Quiet Series™

OPTOLOGIC

FACT

FAST

UHC

OPTOPLANAR

Ultra FRFET™

UniFET™

VCX™

VisualMax™

XS™

FastvCore™

FETBench™

Sync-Lock™

FlashWriter

FPS™

PDP SPM™

*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE

RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY

PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY

THEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE

EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used here in:

1. Life support devices or systems are devices or systems which, (a) are

intended for surgical implant into the body or (b) support or sustain life,

and (c) whose failure to perform when properly used in accordance with

instructions for use provided in the labeling, can be reasonably

expected to result in a significant injury of the user.

2. A critical component in any component of a life support, device, or

system whose failure to perform can be reasonably expected to cause

the failure of the life support device or system, or to affect its safety or

effectiveness.

ANTI-COUNTERFEITING POLICY

Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,

www.Fairchildsemi.com, under Sales Support.

Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their

parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed

application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the

proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild

Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild

Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of

up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and

warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is

committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Datasheet contains the design specifications for product development. Specifications

may change in any manner without notice.

Advance Information

Formative / In Design

Datasheet contains preliminary data; supplementary data will be published at a later

date. Fairchild Semiconductor reserves the right to make changes at any time without

notice to improve design.

Preliminary

First Production

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to

make changes at any time without notice to improve the design.

No Identification Needed

Obsolete

Full Production

Datasheet contains specifications on a product that is discontinued by Fairchild

Semiconductor. The datasheet is for reference information only.

Not In Production

Rev. I48

FDMC510P Rev.C5

www.fairchildsemi.com

FDMC510P相关文章

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FDMC510P产品参数

型号:	FDMC510P
Brand Name：	Fairchild Semiconductor
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Transferred
IHS 制造商：	FAIRCHILD SEMICONDUCTOR CORP
零件包装代码：	MLP
包装说明：	SMALL OUTLINE, S-PDSO-N5
针数：	8
制造商包装代码：	8LD,MLP,DUAL, 3.3MM SQUARE
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8541.29.00.95
风险等级：	5.68
Is Samacsys：	N
雪崩能效等级（Eas）：	37 mJ
外壳连接：	DRAIN
配置：	SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：	20 V
最大漏极电流 (Abs) (ID)：	54 A
最大漏极电流 (ID)：	12 A
最大漏源导通电阻：	0.008 Ω
FET 技术：	METAL-OXIDE SEMICONDUCTOR
JESD-30 代码：	S-PDSO-N5
JESD-609代码：	e4
湿度敏感等级：	1
元件数量：	1
端子数量：	5
工作模式：	ENHANCEMENT MODE
最高工作温度：	150 °C
封装主体材料：	PLASTIC/EPOXY
封装形状：	SQUARE
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260
极性/信道类型：	P-CHANNEL
最大功率耗散 (Abs)：	41 W
最大脉冲漏极电流 (IDM)：	50 A
认证状态：	Not Qualified
子类别：	Other Transistors
表面贴装：	YES
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	NO LEAD
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
晶体管应用：	SWITCHING
晶体管元件材料：	SILICON
Base Number Matches：	1

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