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产品型号TDA7293_03的Datasheet PDF文件预览

TDA7293  
®
120V - 100W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY  
VERY HIGH OPERATING VOLTAGE RANGE  
(±50V)  
MULTIPOWER BCD TECHNOLOGY  
DMOS POWER STAGE  
HIGH OUTPUT POWER (100W @ THD =  
10%, RL = 8, VS = ±40V)  
MUTING/STAND-BY FUNCTIONS  
NO SWITCH ON/OFF NOISE  
VERY LOW DISTORTION  
VERY LOW NOISE  
SHORT CIRCUIT PROTECTED (WITH NO IN-  
PUT SIGNAL APPLIED)  
Multiwatt15V  
Multiwatt15H  
ORDERING NUMBERS:  
TDA7293V  
TDA7293HS  
THERMAL SHUTDOWN  
CLIP DETECTOR  
MODULARITY (MORE DEVICES CAN BE  
EASILY CONNECTED IN PARALLEL TO  
DRIVE VERY LOW IMPEDANCES)  
class TV). Thanks to the wide voltage range and  
to the high out current capability it is able to sup-  
ply the highest power into both 4and 8loads.  
The built in muting function with turn on delay  
simplifies the remote operation avoiding switching  
on-off noises.  
Parallel mode is made possible by connecting  
more device through of pin11. High output power  
can be delivered to very low impedance loads, so  
optimizing the thermal dissipation of the system.  
DESCRIPTION  
The TDA7293 is a monolithic integrated circuit in  
Multiwatt15 package, intended for use as audio  
class AB amplifier in Hi-Fi field applications  
(Home Stereo, self powered loudspeakers, Top-  
Figure 1: Typical Application and Test Circuit  
+Vs  
C7 100nF  
C6 1000µF  
R3 22K  
BUFFER DRIVER  
11  
+Vs  
+PWVs  
13  
C2  
R2  
7
22µF  
680Ω  
IN-  
2
3
-
14  
12  
OUT  
C1 470nF  
IN+  
+
BOOT  
LOADER  
R1 22K  
SGND  
(**)  
4
C5  
22µF  
(*)  
6
5
BOOTSTRAP  
CLIP DET  
VMUTE  
VSTBY  
R5 10K  
MUTE  
STBY  
10  
9
VCLIP  
THERMAL  
SHUTDOWN  
S/C  
PROTECTION  
MUTE  
STBY  
R4 22K  
1
8
-Vs  
15  
STBY-GND  
-PWVs  
C3 10µF  
C4 10µF  
C9 100nF  
C8 1000µF  
D97AU805A  
-Vs  
(*) see Application note  
(**) for SLAVE function  
1/15  
January 2003  
TDA7293  
PIN CONNECTION (Top view)  
15  
14  
13  
12  
11  
10  
9
-VS (POWER)  
OUT  
+VS (POWER)  
BOOTSTRAP LOADER  
BUFFER DRIVER  
MUTE  
STAND-BY  
8
-VS (SIGNAL)  
7
+VS (SIGNAL)  
6
BOOTSTRAP  
5
CLIP AND SHORT CIRCUIT DETECTOR  
SIGNAL GROUND  
NON INVERTING INPUT  
INVERTING INPUT  
STAND-BY GND  
4
3
2
1
TAB CONNECTED TO PIN 8  
D97AU806  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
±60  
90  
Unit  
V
VS  
V1  
Supply Voltage (No Signal)  
VSTAND-BY GND Voltage Referred to -VS (pin 8)  
Input Voltage (inverting) Referred to -VS  
Maximum Differential Inputs  
V
V2  
90  
V
V2 - V3  
V3  
±30  
90  
V
Input Voltage (non inverting) Referred to -VS  
Signal GND Voltage Referred to -VS  
Clip Detector Voltage Referred to -VS  
Bootstrap Voltage Referred to -VS  
Stand-by Voltage Referred to -VS  
Mute Voltage Referred to -VS  
V
V4  
90  
V
V5  
120  
120  
120  
120  
120  
100  
10  
V
V6  
V
V9  
V
V10  
V11  
V12  
IO  
V
Buffer Voltage Referred to -VS  
V
Bootstrap Loader Voltage Referred to -VS  
Output Peak Current  
V
A
Ptot  
Top  
Tstg, Tj  
Power Dissipation Tcase = 70°C  
50  
W
°C  
°C  
Operating Ambient Temperature Range  
Storage and Junction Temperature  
0 to 70  
150  
THERMAL DATA  
Symbol  
Description  
Typ  
1
Max  
Unit  
Rth j-case  
Thermal Resistance Junction-case  
1.5  
°C/W  
2/15  
TDA7293  
ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit VS = ±40V, RL = 8, Rg = 50 ;  
Tamb = 25°C, f = 1 kHz; unless otherwise specified).  
Symbol  
VS  
Parameter  
Supply Range  
Test Condition  
Min.  
Typ.  
Max.  
Unit  
V
±12  
±50  
100  
1
Iq  
Quiescent Current  
50  
mA  
µA  
mV  
µA  
W
Ib  
Input Bias Current  
0.3  
VOS  
IOS  
Input Offset Voltage  
Input Offset Current  
RMS Continuous Output Power  
-10  
10  
0.2  
PO  
d = 1%:  
75  
90  
80  
80  
RL = 4Ω; VS = ± 29V,  
d = 10%  
100  
100  
W
RL = 4; VS = ±29V  
d
Total Harmonic Distortion (**)  
PO = 5W; f = 1kHz  
PO = 0.1 to 50W; f = 20Hz to 15kHz  
0.005  
%
%
0.1  
ISC  
SR  
GV  
GV  
eN  
Current Limiter Threshold  
Slew Rate  
VS ≤ ± 40V  
6.5  
10  
80  
30  
A
V/µs  
dB  
5
Open Loop Voltage Gain  
Closed Loop Voltage Gain (1)  
Total Input Noise  
29  
31  
10  
dB  
A = curve  
f = 20Hz to 20kHz  
1
3
µV  
µV  
Ri  
SVR  
TS  
Input Resistance  
100  
kΩ  
dB  
°C  
°C  
Supply Voltage Rejection  
Thermal Protection  
f = 100Hz; Vripple = 0.5Vrms  
DEVICE MUTED  
75  
150  
160  
DEVICE SHUT DOWN  
STAND-BY FUNCTION (Ref: to pin 1)  
VST on  
VST off  
Stand-by on Threshold  
Stand-by off Threshold  
1.5  
V
V
3.5  
70  
ATTst-by Stand-by Attenuation  
90  
dB  
mA  
Iq st-by  
Quiescent Current @ Stand-by  
0.5  
1
MUTE FUNCTION (Ref: to pin 1)  
VMon  
VMoff  
Mute on Threshold  
Mute off Threshold  
1.5  
V
V
3.5  
60  
ATTmute Mute AttenuatIon  
80  
dB  
CLIP DETECTOR  
Duty  
Duty Cycle ( pin 5)  
THD = 1% ; RL = 10Kto 5V  
10  
40  
%
%
THD = 10% ;  
RL = 10Kto 5V  
30  
3
50  
3
ICLEAK  
PO = 50W  
µA  
SLAVE FUNCTION pin 4 (Ref: to pin 8 -VS)  
VSlave  
SlaveThreshold  
1
V
V
VMaster  
Master Threshold  
Note (1): GVmin 26dB  
Note: Pin 11 only for modular connection. Max external load 1M/10 pF, only for test purpose  
Note (**): Tested with optimized Application Board (see fig. 2)  
3/15  
TDA7293  
Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1)  
4/15  
TDA7293  
APPLICATION SUGGESTIONS (see Test and Application Circuits of the Fig. 1)  
The recommended values of the external components are those shown on the application circuit of Fig-  
ure 1. Different values can be used; the following table can help the designer.  
LARGER THAN  
SUGGESTED  
SMALLER THAN  
SUGGESTED  
COMPONENTS  
SUGGESTED VALUE  
PURPOSE  
R1 (*)  
22k  
INPUT RESISTANCE  
INCREASE INPUT  
IMPEDANCE  
DECREASE INPUT  
IMPEDANCE  
R2  
R3 (*)  
R4  
680Ω  
22k  
CLOSED LOOP GAIN DECREASE OF GAIN INCREASE OF GAIN  
SET TO 30dB (**)  
INCREASE OF GAIN DECREASE OF GAIN  
22k  
ST-BY TIME  
CONSTANT  
LARGER ST-BY  
ON/OFF TIME  
SMALLER ST-BY  
ON/OFF TIME;  
POP NOISE  
R5  
C1  
10k  
MUTE TIME  
CONSTANT  
LARGER MUTE  
ON/OFF TIME  
SMALLER MUTE  
ON/OFF TIME  
0.47µF  
INPUT DC  
DECOUPLING  
HIGHER LOW  
FREQUENCY  
CUTOFF  
C2  
22µF  
FEEDBACK DC  
DECOUPLING  
HIGHER LOW  
FREQUENCY  
CUTOFF  
C3  
C4  
10µF  
10µF  
MUTE TIME  
CONSTANT  
LARGER MUTE  
ON/OFF TIME  
SMALLER MUTE  
ON/OFF TIME  
ST-BY TIME  
CONSTANT  
LARGER ST-BY  
ON/OFF TIME  
SMALLER ST-BY  
ON/OFF TIME;  
POP NOISE  
C5  
22µFXN (***)  
BOOTSTRAPPING  
SIGNAL  
DEGRADATION AT  
LOW FREQUENCY  
C6, C8  
C7, C9  
1000µF  
0.1µF  
SUPPLY VOLTAGE  
BYPASS  
SUPPLY VOLTAGE  
BYPASS  
DANGER OF  
OSCILLATION  
(*) R1 = R3 for pop optimization  
(**) Closed Loop Gain has to be 26dB  
(***) Multiplay this value for the number of modular part connected  
Slave function: pin 4 (Ref to pin 8 -VS)  
Note:  
If in the application, the speakers are connected  
via long wires, it is a good rule to add between  
the output and GND, a Boucherot Cell, in order to  
avoid dangerous spurious oscillations when the  
speakers terminal are shorted.  
MASTER  
-VS +3V  
UNDEFINED  
-VS +1V  
The suggested Boucherot Resistor is 3.9/2W  
and the capacitor is 1µF.  
SLAVE  
-VS  
D98AU821  
5/15  
TDA7293  
frequency response; moreover, an accurate con-  
trol of quiescent current is required.  
A local linearizing feedback, provided by differen-  
tial amplifier A, is used to fullfil the above require-  
ments, allowing a simple and effective quiescent  
current setting.  
INTRODUCTION  
In consumer electronics, an increasing demand  
has arisen for very high power monolithic audio  
amplifiers able to match, with a low cost, the per-  
formance obtained from the best discrete de-  
signs.  
Proper biasing of the power output transistors  
alone is however not enough to guarantee the ab-  
sence of crossover distortion.  
While a linearization of the DC transfer charac-  
teristic of the stage is obtained, the dynamic be-  
haviour of the system must be taken into account.  
The task of realizing this linear integrated circuit  
in conventional bipolar technology is made ex-  
tremely difficult by the occurence of 2nd break-  
down phoenomenon. It limits the safe operating  
area (SOA) of the power devices, and, as a con-  
sequence, the maximum attainable output power,  
especially in presence of highly reactive loads.  
A significant aid in keeping the distortion contrib-  
uted by the final stage as low as possible is pro-  
vided by the compensation scheme, which ex-  
ploits the direct connection of the Miller capacitor  
at the amplifier’s output to introduce a local AC  
feedback path enclosing the output stage itself.  
Moreover, full exploitation of the SOA translates  
into a substantial increase in circuit and layout  
complexity due to the need of sophisticated pro-  
tection circuits.  
To overcome these substantial drawbacks, the  
use of power MOS devices, which are immune  
from secondary breakdown is highly desirable.  
2) Protections  
The device described has therefore been devel-  
oped in a mixed bipolar-MOS high voltage tech-  
nology called BCDII 100/120.  
In designing a power IC, particular attention must  
be reserved to the circuits devoted to protection  
of the device from short circuit or overload condi-  
tions.  
1) Output Stage  
Due to the absence of the 2nd breakdown phe-  
nomenon, the SOA of the power DMOS transis-  
tors is delimited only by a maximum dissipation  
curve dependent on the duration of the applied  
stimulus.  
The main design task in developping a power op-  
erational amplifier, independently of the technol-  
ogy used, is that of realization of the output stage.  
The solution shown as a principle shematic by  
Fig3 represents the DMOS unity - gain output  
buffer of the TDA7293.  
This large-signal, high-power buffer must be ca-  
pable of handling extremely high current and volt-  
age levels while maintaining acceptably low har-  
monic distortion and good behaviour over  
In order to fully exploit the capabilities of the  
power transistors, the protection scheme imple-  
mented in this device combines a conventional  
SOA protection circuit with a novel local tempera-  
ture sensing technique which " dynamically" con-  
trols the maximum dissipation.  
Figure 3: Principle Schematic of a DMOS unity-gain buffer.  
6/15  
TDA7293  
Figure 4: Turn ON/OFF Suggested Sequence  
+Vs  
(V)  
+40  
-40  
-Vs  
V
(mV)  
IN  
V
ST-BY  
5V  
5V  
PIN #9  
(V)  
V
MUTE  
PIN #10  
(V)  
I
Q
(mA)  
V
OUT  
(V)  
OFF  
ST-BY  
PLAY  
ST-BY  
OFF  
MUTE  
MUTE  
D98AU817  
mute functions, independently driven by two  
CMOS logic compatible input pins.  
In addition to the overload protection described  
above, the device features a thermal shutdown  
circuit which initially puts the device into a muting  
state (@ Tj = 150 oC) and then into stand-by (@  
Tj = 160 oC).  
Full protection against electrostatic discharges on  
every pin is included.  
The circuits dedicated to the switching on and off  
of the amplifier have been carefully optimized to  
avoid any kind of uncontrolled audible transient at  
the output.  
The sequence that we recommend during the  
ON/OFF transients is shown by Figure 4.  
Figure 5: Single Signal ST-BY/MUTE Control  
The application of figure 5 shows the possibility of  
using only one command for both st-by and mute  
functions. On both the pins, the maximum appli-  
cable range corresponds to the operating supply  
voltage.  
Circuit  
MUTE  
STBY  
20K  
30K  
MUTE/  
ST-BY  
APPLICATION INFORMATION  
HIGH-EFFICIENCY  
10K  
Constraints of implementing high power solutions  
are the power dissipation and the size of the  
power supply. These are both due to the low effi-  
ciency of conventional AB class amplifier ap-  
proaches.  
10µF  
10µF  
1N4148  
D93AU014  
Here below (figure 6) is described a circuit pro-  
posal for a high efficiency amplifier which can be  
adopted for both HI-FI and CAR-RADIO applica-  
tions.  
3) Other Features  
The device is provided with both stand-by and  
7/15  
TDA7293  
The TDA7293 is a monolithic MOS power ampli-  
fier which can be operated at 100V supply voltage  
(120V with no signal applied) while delivering out-  
put currents up to ±6.5 A.  
The main advantages offered by this solution are:  
- High power performances with limited supply  
voltage level.  
- Considerably high output power even with high  
load values (i.e. 16 Ohm).  
With Rl= 8 Ohm, Vs = ±25V the maximum output  
power obtainable is 150 W, while with Rl=16  
Ohm, Vs = ±40V the maximum Pout is 200 W.  
This allows the use of this device as a very high  
power amplifier (up to 180W as peak power with  
T.H.D.=10 % and Rl = 4 Ohm); the only drawback  
is the power dissipation, hardly manageable in  
the above power range.  
The typical junction-to-case thermal resistance of  
o
o
the TDA7293 is 1 C/W (max= 1.5 C/W). To  
avoid that, in worst case conditions, the chip tem-  
perature exceedes 150 oC, the thermal resistance  
of the heatsink must be 0.038 oC/W (@ max am-  
bient temperature of 50 oC).  
APPLICATION NOTE: (ref. fig. 7)  
Modular Application (more Devices in Parallel)  
The use of the modular application lets very high  
power be delivered to very low impedance loads.  
The modular application implies one device to act  
as a master and the others as slaves.  
As the above value is pratically unreachable; a  
high efficiency system is needed in those cases  
where the continuous RMS output power is higher  
than 50-60 W.  
The TDA7293 was designed to work also in  
higher efficiency way.  
For this reason there are four power supply pins:  
two intended for the signal part and two for the  
power part.  
The slave power stages are driven by the master  
device and work in parallel all together, while the in-  
put and the gain stages of the slave device are dis-  
abled, the figure below shows the connections re-  
quired to configure two devices to work together.  
T1 and T2 are two power transistors that only  
operate when the output power reaches a certain  
threshold (e.g. 20 W). If the output power in-  
creases, these transistors are switched on during  
the portion of the signal where more output volt-  
age swing is needed, thus "bootstrapping" the  
power supply pins (#13 and #15).  
The master chip connections are the same as  
the normal single ones.  
The outputs can be connected together with-  
out the need of any ballast resistance.  
The slave SGND pin must be tied to the nega-  
tive supply.  
The current generators formed by T4, T7, zener  
diodes Z1, Z2 and resistors R7,R8 define the  
minimum drop across the power MOS transistors  
of the TDA7293. L1, L2, L3 and the snubbers C9,  
R1 and C10, R2 stabilize the loops formed by the  
"bootstrap" circuits and the output stage of the  
TDA7293.  
By considering again a maximum average  
output power (music signal) of 20W, in case  
of the high efficiency application, the thermal  
resistance value needed from the heatsink is  
2.2oC/W (Vs =±50 V and Rl= 8 Ohm).  
All components (TDA7293 and power transis-  
tors T1 and T2) can be placed on a 1.5oC/W  
heatsink, with the power darlingtons electrically  
insulated from the heatsink.  
Since the total power dissipation is less than that  
of a usual class AB amplifier, additional cost sav-  
ings can be obtained while optimizing the power  
supply, even with a high heatsink .  
The slave ST-BY and MUTE pins must be con-  
nected to the master ST-BY and MUTE pins.  
The bootstrap lines must be connected to-  
gether and the bootstrap capacitor must be in-  
creased: for N devices the boostrap capacitor  
must be 22µF times N.  
The slave IN-pin must be connected to the  
negative supply.  
THE BOOTSTRAP CAPACITOR  
For compatibility purpose with the previous de-  
vices of the family, the boostrap capacitor can be  
connected both between the bootstrap pin (6) and  
the output pin (14) or between the boostrap pin  
(6) and the bootstrap loader pin (12).  
When the bootcap is connected between pin 6  
and 14, the maximum supply voltage in presence  
of output signal is limited to 100V, due the boot-  
strap capacitor overvoltage.  
When the bootcap is connected between pins 6  
and 12 the maximum supply voltage extend to the  
full voltage that the technology can stand: 120V.  
BRIDGE APPLICATION  
Another application suggestion is the BRIDGE  
configuration, where two TDA7293 are used.  
In this application, the value of the load must not  
be lower than 8 Ohm for dissipation and current  
capability reasons.  
A suitable field of application includes HI-FI/TV  
subwoofers realizations.  
This is accomplished by the clamp introduced at  
the bootstrap loader pin (12): this pin follows the  
output voltage up to 100V and remains clamped  
at 100V for higher output voltages. This feature  
lets the output voltage swing up to a gate-source  
voltage from the positive supply (VS -3 to 6V).  
8/15  
TDA7293  
Figure 6: High Efficiency Application Circuit  
+50V  
T3  
BC394  
R4  
270  
R5  
270  
D6  
1N4001  
T1  
BDX53A  
D1 BYW98100  
C12 330nF  
T4  
BC393  
T5  
BC393  
+25V  
R17 270  
L1 1µH  
D3 1N4148  
R6  
20K  
Z1 3.9V  
C11 22µF  
7
13  
R20  
20K  
C1  
1000µF  
63V  
C3  
100nF  
C5  
1000µF  
35V  
C7  
100nF  
C9  
330nF  
IN  
3
4
R3 680  
R12  
13K  
2
R7  
3.3K  
C16  
1.8nF  
R22  
10K  
R1  
2
R16  
13K  
L3 5µH  
TDA7293  
OUT  
PLAY  
14  
6
C13 10µF  
GND  
R18 270  
9
C15  
22µF  
Pot  
R13 20K  
R14 30K  
R15 10K  
ST-BY  
R8  
3.3K  
C17  
1.8nF  
R23  
10K  
R2  
2
1
D5  
1N4148  
12  
8
15  
R21  
20K  
C2  
1000µF  
63V  
C4  
100nF  
C6  
1000µF  
35V  
C8  
100nF  
C10  
330nF  
10  
Z2 3.9V  
C14  
10µF  
L2 1µH  
D4 1N4148  
T7  
T8  
BC394  
BC394  
D2 BYW98100  
R19 270  
T2  
-25V  
R9  
270  
R10  
270  
R11  
20K  
D7  
BDX54A  
T6  
1N4001  
BC393  
-50V  
D97AU807C  
Figure 6a: PCB and Component Layout of the fig. 6  
9/15  
TDA7293  
Figure 6b: PCB - Solder Side of the fig. 6.  
Figure 7: Modular Application Circuit  
+Vs  
C7 100nF  
C6 1000µF  
R3 22K  
MASTER  
BUFFER  
DRIVER  
+Vs  
+PWVs  
13  
C2  
R2  
7
11  
22µF  
680Ω  
IN-  
2
3
-
14  
12  
OUT  
C1 470nF  
IN+  
C10  
100nF  
+
BOOT  
LOADER  
R1 22K  
R7  
2Ω  
SGND  
MUTE  
STBY  
4
C5  
47µF  
VMUTE  
VSTBY  
R5 10K  
10  
9
6
5
BOOTSTRAP  
CLIP DET  
MUTE  
THERMAL  
SHUTDOWN  
S/C  
PROTECTION  
STBY  
1
R4 22K  
8
-Vs  
15  
STBY-GND  
-PWVs  
C4 10µF  
C9 100nF  
C8 1000µF  
C3 10µF  
-Vs  
+Vs  
C7 100nF  
C6 1000µF  
BUFFER  
DRIVER  
+Vs  
+PWVs  
13  
7
11  
IN-  
2
3
-
14  
12  
OUT  
IN+  
+
BOOT  
LOADER  
SLAVE  
SGND  
MUTE  
4
10  
9
6
5
MUTE  
BOOTSTRAP  
THERMAL  
SHUTDOWN  
S/C  
PROTECTION  
STBY  
STBY  
1
8
-Vs  
15  
STBY-GND  
-PWVs  
C9 100nF  
C8 1000µF  
D97AU808D  
-Vs  
10/15  
TDA7293  
Figure 8a: Modular Application P.C. Board and Component Layout (scale 1:1) (Component SIDE)  
Figure 8b: Modular Application P.C. Board and Component Layout (scale 1:1) (Solder SIDE)  
11/15  
TDA7293  
Figure 12: Modular Application Derating Rload  
Figure 9: Distortion vs Output Power  
vs Vsupply (ref. fig. 7)  
T.H.D (%)  
10  
6
5
4
3
5
2
1
0.5  
0.2  
0.1  
Vs = +/-29V  
Rl = 4 Ohm  
f = 20 KHz  
0.05  
2
0.02  
0.01  
f = 1KHz  
Forbidden Area  
Pd > 50W at Tcase=70°C  
0.005  
1
0.002  
0.001  
0
2
5
10  
20  
50  
100  
20  
25  
30  
35  
40  
45  
50  
Pout (W)  
Supply Voltage (+/-Vcc)  
Figure 10: Distortion vs Output Power  
Figure 13: Modular Application Pd vs Vsupply  
(ref. fig. 7)  
T.H.D (%)  
10  
5
60  
Pd limit at Tcase=70°C  
2
1
Dissipated Power for each  
50  
device of the modular  
application  
Vs = +/-40V  
Rl = 8 Ohm  
0.5  
4ohm  
40  
f = 20 KHz  
0.2  
0.1  
30  
0.05  
8ohm  
0.02  
0.01  
20  
10  
0
f = 1KHz  
0.005  
0.002  
0.001  
2
5
10  
Pout (W)  
20  
50  
100  
20  
25  
30  
35  
40  
45  
50  
Supply Voltage (+/-Vcc)  
Figure 11: Distortion vs Frequency  
Figure 14: Output Power vs. Supply Voltage  
T.H.D. (%)  
10  
Po (W)  
120  
110  
100  
Rl=8 Ohm  
1
90  
VS= +/- 35 V  
f= 1 KHz  
80  
Rl= 8 Ohm  
T.H.D.=10 %  
70  
60  
50  
40  
0.1  
Pout=100 mW  
THD=0.5 %  
30  
0.01  
20  
10  
0
Po=50 W  
0.001  
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40  
Vs (+/-V)  
0
0.1  
1
10  
100  
Frequency (KHz)  
12/15  
TDA7293  
13/15  
TDA7293  
mm  
inch  
DIM.  
OUTLINE AND  
MIN. TYP. MAX. MIN. TYP. MAX.  
MECHANICAL DATA  
A
B
5
0.197  
0.104  
0.063  
0.022  
0.030  
2.65  
C
1.6  
E
0.49  
0.66  
1.14  
0.55 0.019  
0.75 0.026  
F
G
1.27  
1.4  
0.045 0.050 0.055  
G1  
H1  
H2  
L
17.57 17.78 17.91 0.692 0.700 0.705  
19.6 0.772  
20.2  
0.795  
20.57  
18.03  
2.54  
0.810  
0.710  
0.100  
L1  
L2  
L3  
L4  
L5  
L6  
L7  
S
17.25 17.5 17.75 0.679 0.689 0.699  
10.3  
10.7  
5.28  
2.38  
10.9 0.406 0.421 0.429  
0.208  
0.094  
2.65  
1.9  
2.9  
2.6  
2.6  
0.104  
0.075  
0.075  
0.114  
0.102  
0.102  
0.152  
Multiwatt15 H  
S1  
Dia1  
1.9  
3.65  
3.85 0.144  
14/15  
TDA7293  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences  
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is  
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are  
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products  
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.  
The ST logo is a registered trademark of STMicroelectronics  
© 2003 STMicroelectronics – Printed in Italy – All Rights Reserved  
STMicroelectronics GROUP OF COMPANIES  
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco -  
Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.  
http://www.st.com  
15/15  
配单直通车
TDA7294产品参数
型号:TDA7294
是否Rohs认证: 不符合
生命周期:Active
IHS 制造商:STMICROELECTRONICS
Reach Compliance Code:not_compliant
ECCN代码:EAR99
风险等级:5.83
商用集成电路类型:AUDIO AMPLIFIER
JESD-30 代码:R-PZIP-T15
JESD-609代码:e0
功能数量:1
端子数量:15
最高工作温度:70 °C
最低工作温度:
封装主体材料:PLASTIC/EPOXY
封装代码:ZIP
封装等效代码:ZIP15,.2,.17TB
封装形状:RECTANGULAR
封装形式:IN-LINE
认证状态:Not Qualified
子类别:Audio/Video Amplifiers
表面贴装:NO
温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE
端子节距:1.27 mm
端子位置:ZIG-ZAG
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