440GR – PPC440GR Embedded Processor
Revision 1.16 – July 19, 2006
Preliminary Data Sheet
Table 9. Recommended DC Operating Conditions (Sheet 1 of 2)
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended
conditions can affect device reliability.
Parameter
Logic Supply Voltage
I/O Supply Voltage
SDRAM Supply Voltage
PLL Supply Voltages
SDRAM PLL Voltage
DDR SDRAM Reference Voltage
Input Logic High (2.5V SSTL)
Input Logic High (2.5V CMOS, 3.3V tolerant receiver)
Symbol
V
DD
OV
DD
SV
DD
AV
DD
SAV
DD
SV
REF
Minimum
+1.4
+3.0
+2.3
+1.4
+1.4
+1.15
SV
REF
+0.18
1.7
Typical
+1.5
+3.3
+2.5
+1.5
+1.5
+1.25
Maximum
+1.6
+3.6
+2.7
+1.6
+1.6
+1.35
SV
DD
+0.3
???
OV
DD
+0.5
+3.6
SV
REF
-0.18
0.7
0.35OV
DD
+0.8
SV
DD
???
OV
DD
OV
DD
0.55
0.4
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Notes
4
4
4
3, 4
3, 4
2
V
IH
Input Logic High (3.3V PCI)
Input Logic High (3.3V LVTTL)
Input Logic Low (2.5V SSTL)
Input Logic Low (2.5V CMOS, 3.3V tolerant receiver)
V
IL
Input Logic Low (3.3V PCI)
Input Logic Low (3.3V LVTTL)
Output Logic High (2.5V SSTL)
Output Logic High (2.5V CMOS, 3.3V tolerant receiver)
V
OH
Output Logic High (3.3V PCI)
Output Logic High (3.3V LVTTL)
Output Logic Low (2.5V SSTL)
Output Logic Low (2.5V CMOS, 3.3V tolerant receiver)
V
OL
Output Logic Low (3.3V PCI)
Output Logic Low (3.3V LVTTL)
Input Leakage Current (No pull-up or pull-down)
Input Leakage Current for Pull-Down
Input Leakage Current for Pull-Up
Input Max Allowable Overshoot (3.3V LVTTL)
Input Max Allowable Undershoot (3.3V LVTTL)
Output Max Allowable Overshoot (3.3V LVTTL)
Output Max Allowable Undershoot (3.3V LVTTL)
I
IL1
I
IL2
I
IL3
V
IMAO
V
IMAU
V
OMAO
V
OMAU3
-0.6
-0.6
+3.9
0
0
0 (LPDL)
-150 (LPDL)
-0.5
0
+1.95
2.0
0.9OV
DD
+2.4
0
1
0.5OV
DD
+2.0
-0.3
???
1
1
0.1OV
DD
+0.4
0
200 (MPUL)
0 (MPUL)
+3.9
1
μ
A
μ
A
μ
A
V
V
V
V
AMCC Proprietary
59
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
