Revision 1.16 – July 19, 2006
440GR – PPC440GR Embedded Processor
Preliminary Data Sheet
Table 9. Recommended DC Operating Conditions (Sheet 2 of 2)
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended
conditions can affect device reliability.
Parameter
Symbol
Minimum
Typical
Maximum
Unit
Notes
Case Temperature:
333MHz, 400MHz, and 533MHz parts
667MHz parts
-40
-40
+100
+85
TC
°C
Notes:
1. PCI drivers meet PCI specifications.
2. SVREF = SVDD/2
3. The analog voltages used for the on-chip PLLs can be derived from the logic voltage, but must be filtered before entering the
PPC440GR. See “Absolute Maximum Ratings” on page 58.
Power Sequencing
Startup sequencing of the power supply voltages is not required. However, a power-down cycle must complete
(OV and V are below +0.4V) before a new power-up cycle is started.
DD
DD
Table 10. Input Capacitance
Parameter
Symbol
Maximum
2.5
Unit
pF
Notes
CIN1
Group 1 (2.5V SSTL I/O)
Group 2 (3.3V LVTTL I/O)
Group 3 (PCI I/O)
CIN2
CIN3
CIN4
CIN5
2.1
pF
2.5
pF
Group 4 (Receivers)
0.9
pF
Group 5 (3.3V tolerant CMOS I/O)
2.4
pF
Table 11. Typical DC Power Supply Requirements
+1.5V Supply
(VDD+AVDD+SAVDD
+2.5V Supply
+3.3V Supply
Frequency (MHz)
Total
Unit
Notes
)
(SVDD
)
(OVDD)
333
400
533
667
1.00
1.09
1.28
1.93
1.15
1.15
1.15
1.15
0.04
0.04
0.04
0.04
2.19
2.28
2.47
3.12
W
W
W
W
1
1
1
1
Notes:
1. Typical Power is based on nominal voltage of VDD = +1.5V, TC = max. specified in Table 9 on page 59, while running Linux and a test
application that exercises each core with representative traffic.
60
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
