M29F400BT, M29F400BB
Figure 2. TSOP Connections
Figure 3. SO Connections
A15
A14
A13
A12
A11
A10
A9
1
48
A16
NC
RB
A17
A7
A6
A5
A4
A3
A2
A1
A0
E
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
RP
BYTE
2
W
V
SS
3
A8
DQ15A–1
4
A9
DQ7
5
A10
A11
A12
A13
A14
A15
A16
BYTE
DQ14
DQ6
6
7
A8
DQ13
DQ5
8
NC
NC
W
9
DQ12
DQ4
10
11
12
13
14
15
16
17
18
19
20
21
22
M29F400BT
M29F400BB
RP
NC
NC
RB
NC
A17
A7
12
13
37
36
V
M29F400BT
M29F400BB
CC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
G
V
V
SS
DQ15A–1
SS
G
DQ0
DQ8
DQ7
DQ14
DQ6
DQ1
DQ9
DQ13
DQ5
A6
DQ2
A5
DQ10
DQ3
DQ12
DQ4
A4
A3
V
E
SS
DQ11
V
CC
A2
AI02906
A1
24
25
A0
AI02905
Table 1. Signal Names
SUMMARY DESCRIPTION
The M29F400B is a 4 Mbit (512Kb x8 or 256Kb
x16) non-volatile memory that can be read, erased
and reprogrammed. These operations can be per-
formed using a single 5V supply. On power-up the
memory defaults to its Read mode where it can be
read in the same way as a ROM or EPROM. The
M29F400B is fully backward compatible with the
M29F400.
A0-A17
DQ0-DQ7
DQ8-DQ14
DQ15A–1
E
Address Inputs
Data Inputs/Outputs
Data Inputs/Outputs
Data Input/Output or Address Input
Chip Enable
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Each block can
be protected independently to prevent accidental
Program or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents. The end
of a program or erase operation can be detected
and any error conditions identified. The command
set required to control the memory is consistent
with JEDEC standards.
G
Output Enable
W
Write Enable
RP
Reset/Block Temporary Unprotect
Ready/Busy Output
Byte/Word Organization Select
Supply Voltage
RB
BYTE
V
CC
V
SS
Ground
NC
Not Connected Internally
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