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T2316405A-60 参数 Datasheet PDF下载

T2316405A-60图片预览
型号: T2316405A-60
PDF下载: 下载PDF文件 查看货源
内容描述: 4M ×4动态RAM EDO页模式 [4M x 4 DYNAMIC RAM EDO PAGE MODE]
分类和应用:
文件页数/大小: 14 页 / 137 K
品牌: TMT [ TAIWAN MEMORY TECHNOLOGY ]
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tm
TE
CH
T2316405A
Preliminary T2316407A
AC CHARACTERISTICS
(note 1,2,3) (Ta = 0 to 70
°
C)
TEST CONDITIONS:
T2316405A-10 Vcc = 2.6V
±
0.2V , T2316407A-50/60/70 Vcc = 3.3V
±
0.3V
V
IH
/V
IL
=2.0/0.8V,V
OH
/V
OL
=2.0/0.8V
Input rise and fall times: 2ns , Output Load: 2TTL gate + CL (100pF)
AC CHARACTERISTICS
PARAMETER
Read or Write Cycle Time
Read Write Cycle Time
EDO-Page-Mode Read or Write Cycle Time
EDO-Page-Mode Read-Write Cycle Time
Access Time From RAS
Access Time From CAS
Access Time From OE
Access Time From Column Address
Access Time From
CAS
Precharge
RAS Pulse Width
RAS Pulse Width (EDO Page Mode)
RAS Hold Time
RAS Precharge Time
CAS
Pulse Width
SYM
-50
-60
-70
124
160
30
78
70
-10
180
240
40
120
100
UNIT Notes
Min Max Min Max Min Max Min Max
tRC
84
104
tRWC 108
135
tPC
20
25
tPCM 56
68
tRAC
50
60
tCAC
13
15
tOAC
13
15
tAA
25
30
tACP
30
35
tRAS 50 10K 60 10K
tRASC
100
100
50
60
K
K
tRSH
8
10
tRP
30
40
tCAS
tCSH
tCP
tRCD
tCRP
tASR
tRAH
tRAD
tASC
tCAH
tAR
tRAL
tRCS
tRCH
tRRH
tCLZ
tOFF1
38
10
12
5
0
8
10
0
8
21
25
0
0
0
0
0
12
37
40
10
14
5
0
10
12
0
10
24
30
0
0
0
0
0
15
45
20
25
20
25
35
50
40
55
70 10K 100 10K
100
100
70
100
K
K
13
25
ns
ns
ns
ns
ns 4
ns 5
ns 13
ns 8
ns
ns
ns
ns
ns
ns
ns
ns
ns 7
ns
ns
ns
ns 8
ns
ns
ns
ns
ns 14
9,14
ns
ns
ns
9
50
70
8 10K 10 10K 13 10K 25 10K
45
10
14
5
0
10
12
0
13
27
35
0
0
0
0
0
20
50
100
10
25
5
0
15
20
0
20
45
50
0
0
0
0
0
25
75
CAS Hold Time
CAS
Precharge Time (EDO Page Mode)
RAS to CAS Delay Time
CAS to RAS Precharge Time
Row Address Setup Time
Row Address Hold Time
RAS to Column Address Delay Time
Column Address Setup Time
Column Address Hold Time
Column Address Hold Time (Reference to
RAS )
Column Address to RAS Lead Time
Read Command Setup Time
Read Command Hold Time Reference to
CAS
25
30
35
50
Read Command Hold Time Reference to
RAS
CAS
to Output in Low-Z
Output Buffer Turn-off Delay From CAS or
RAS
ns
10,16
Taiwan Memory Technology, Inc. reserves the right
P. 5
to change products or specifications without notice.
Publication Date: APR. 2001
Revision:0.B