tm
TE
CH
T2316405A
Preliminary T2316407A
-50
SYM
tOFF2
tWCS
tWCH
tWCR
tWP
tRWL
tCWL
tDS
tDH
tDHR
0
0
8
21
8
10
8
0
8
21
12
0
0
10
24
10
10
10
0
10
24
79
49
34
50
2
5
10
10
10
5
5
10
7
5
10
15
50
32
5
10
10
13
5
5
10
10
5
20
-60
15
0
0
13
27
10
13
13
0
13
27
94
59
44
2
50
32
5
10
10
25
5
5
10
13
5
25
-70
20
0
0
15
40
15
25
25
0
20
45
130
80
55
2
50
32
-10
UNIT Notes
AC CHARACTERISTICS
(continued)
AC CHARACTERISTICS
PARAMETER
Output Buffer Turn-off to OE
Write Command Setup Time
Write Command Hold Time
Write Command Hold Time (Reference
to RAS )
Write Command Pulse Width
Write Command to RAS Lead Time
Write Command to CAS Lead Time
Data-in Setup Time
Data-in Hold Time
Data-in Hold Time (Reference to RAS )
RAS
to
WE
Delay Time
Min Max Min Max Min Max Min Max
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
16
11,14
14
14
14
14
12
12
tRWD 64
tAWD 39
tCWD 26
tT
tREF
tRPC
tCSR
tCHR
tOEH
tOES
tOEH
C
tOEP
tORD
2
32
5
5
8
8
5
5
10
5
5
11
11
11
2,3
Column Address to WE Delay Time
CAS to WE Delay Time
Transition Time (rise or fall)
Refresh Period (2048 cycles)
RAS
to
CAS
Precharge Time
CAS Setup Time (CBR REFRESH)
CAS Hold Time (CBR REFRESH)
OE Hold Time From WE During Read-
Modify-Write Cycle
OE Low to CAS High Setup Time
OE
High Hold Time From
CAS
High
6
6
15
OE High Pulse Width
OE
Setup Prior to
RAS
During Hidden
Refresh Cycle
Data Output Hold After CAS Returning Low tCOH
tWHZ
Output Disable Delay From WE
Taiwan Memory Technology, Inc. reserves the right
P. 6
to change products or specifications without notice.
Publication Date: APR. 2001
Revision:0.B
TMT [ TAIWAN MEMORY TECHNOLOGY ]
