Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
Parameter
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
N-Channel
V
DS
= 10 V,
I
D
= 4.8 A, V
GS
= 10 V
P-Channel
V
DS
= -10 V,
I
D
= -4.8 A, V
GS
= -10 V
Conditions
N-Channel
V
DD
= 10 V, I
D
= 1 A,
V
GEN
= 10 V, R
GEN
= 6
Ω
P-Channel
V
DD
= -10 V, I
D
= -1 A,
V
GEN
= -10 V, R
GEN
= 6
Ω
Type
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
t
rr
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
Reverse Recovery Time
V
GS
= 0 V, I
S
= 2.0 A
V
GS
= 0 V, I
S
= -2.0 A
N-Ch
P-Ch
(Note 2)
(Note 2)
Min
Typ
12
9
13
20
29
40
10
19
19
21
2.1
3.2
5.2
5.2
Max
20
20
30
25
50
50
20
40
30
30
Units
ns
ns
ns
ns
nC
nC
nC
SWITCHING CHARACTERISTICS
(Note 2)
2
-2
0.9
-0.85
1.2
-1.2
100
100
A
V
ns
N-Ch
P-Ch
N-Ch
P-Ch
N-Channel
V
GS
= 0 V, I
F
= 2.0 A, dI
F
/dt = 100 A/µs
P-Channel
V
GS
= 0 V, I
F
= -2.0 A, dI
F
/dt = 100 A/µs
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
P
D
(
t
) =
R
θ
J A
t
)
(
T
J
−
T
A
=
T
J
−
T
A
R
θ
J C
R
θ
CA
t
)
+
(
=
I
2
(
t
) ×
R
DS
(
ON
)
D
T
J
Typical R
θ
JA
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 50
o
C/W when mounted on a 1 in
2
pad of 2oz copper.
b. 105
o
C/W when mounted on a 0.04 in
2
pad of 2oz copper.
c. 125 C/W when mounted on a 0.006 in pad of 2oz copper.
o
2
1a
1b
1c
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDS8858H Rev. C
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
