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产品型号NLAS4684MNR2的概述

芯片NLAS4684MNR2的概述 NLAS4684MNR2是一款高性能、低功耗的双向电平转换器，设计用以实现不同逻辑电压水平之间的无缝互联。在现代电子设计中，随着集成电路技术的不断发展，各种不同的逻辑电平和接口标准层出不穷，使得不同电压的系统之间的连接变得越来越重要。NLAS4684MNR2作为一款灵活且高效的电平转换器，对于有效地解决这一问题显得尤为重要。该芯片广泛用于诸如传感器接口、嵌入式系统、移动设备以及各种通信协议等应用中。芯片NLAS4684MNR2的详细参数 NLAS4684MNR2的各项参数如下： - 电源电压范围：可以支持从1.2V到5.5V的电源电压。 - 工作温度范围：-40°C至+85°C，适合恶劣环境下的应用。 - 输入漏电流：最大为1μA，这确保了在待机模式下的高能效。 - 逻辑输入电平：支持TTL和CMOS输入，与多种微控制器兼容。 - 转化延迟：在高频...

产品型号NLAS4684MNR2的Datasheet PDF文件预览

NLAS4684

Ultra−Low Resistance

Dual SPDT Analog Switch

The NLAS4684 is an advanced CMOS analog switch fabricated in

Sub−micron silicon gate CMOS technology. The device is a dual

Independent Single Pole Double Throw (SPDT) switch featuring

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Ultra−Low R of 0.5 W, for the Normally Closed (NC) switch, and

0.8 W for the Normally Opened switch (NO) at 2.7 V.

The part also features guaranteed Break Before Make switching,

assuring the switches never short the driver.

MARKING

DIAGRAMS

The NLAS4684 is available in a 2.0 x 1.5 mm bumped die array.

The pitch of the solder bumps is 0.5 mm for easy handling.

4684

AYWW

4684

AYWWG

Features

Microbump−10

CASE 489AA

• Ultra−Low R , t0.5 W at 2.7 V

• Threshold Adjusted to Function with 1.8 V Control at

= 2.7−3.3 V

• Single Supply Operation from 1.8−5.5 V

• Tiny 2 x 1.5 mm Bumped Die

• Low Crosstalk, t 83 dB at 100 kHz

NLAS

4684

NLAS

4684

ALYW

QFN−10

CASE 485C

• Full 0−V Signal Handling Capability

• High Isolation, −65 dB at 100 kHz

• Low Standby Current, t50 nA

• Low Distortion, t0.14% THD

NLAS

4684

• R Flatness of 0.15

ALYW

• Pin for Pin Replacement for MAX4684

• High Continuous Current Capability

$300 mA Through Each Switch

Micro10

CASE 846B

• Large Current Clamping Diodes at Analog Inputs

$300 mA Continuous Current Capability

• Pb−Free Package is Available*

= Assembly Location

= Wafer Lot

= Year

WW, W = Work Week

Applications

= Pb−Free Package

• Cell Phone

• Speaker Switching

• Power Switching

• Modems

FUNCTION TABLE

IN 1, 2

NO 1, 2

NC 1, 2

OFF

• Automotive

OFF

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 11 of this data sheet.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2004

Publication Order Number:

August, 2004 − Rev. 11

NLAS4684/D

NLAS4684

GND

NC2

NC1

IN1

IN2

COM2

NO2

COM1

NO1

(Top View)

Figure 1. Pin Connections and Logic Diagram

(QFN−10 and Micro10)

GND

NC2

IN2

NC1

IN1

COM2

NO2

COM1

NO1

(Top View)

Figure 2. Pin Connections and Logic Diagram

(Microbump−10)

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NLAS4684

MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

Positive DC Supply Voltage

*0.5 to )7.0

Analog Input Voltage (V , V , or V

)

*0.5 v V v V )0.5

NO NC

COM

Digital Select Input Voltage

*0.5 v V v)7.0

Continuous DC Current from COM to NC/NO

$300

$500

$300

$500

anl1

Peak Current from COM to NC/NO, 10 duty cycle (Note 1)

Continuous DC Current into COM/NO/NC

anl−pk 1

clmp

clmp 1

Peak Current into Input Clamp Diodes at COM/NC/NO

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit

values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,

damage may occur and reliability may be affected.

1. Defined as 10% ON, 90% off duty cycle.

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

1.8

Max

5.5

Unit

DC Supply Voltage

Digital Select Input Voltage

GND

*55

5.5

Analog Input Voltage (NC, NO, COM)

Operating Temperature Range

Input Rise or Fall Time, SELECT

)125

°C

ns/V

t , t

= 3.3 V $ 0.3 V

= 5.0 V $ 0.5 V

100

DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND)

Guaranteed Limit

*555C to 255C t855C t1255C

Symbol

Parameter

Condition

$10%

Unit

Minimum High−Level Input

Voltage, Select Inputs

(Figure 10)

2.0

2.5

3.0

5.0

1.4

2.0

1.4

2.0

1.4

2.0

Maximum Low−Level Input

Voltage, Select Inputs

(Figure 10)

2.0

2.5

3.0

5.0

0.5

0.8

0.5

0.8

0.5

0.8

Maximum Input Leakage

Current, Select Inputs

= 5.5 V or GND

5.5

$ 1.0

Power Off Leakage Current

$10

m A

OFF

Maximum Quiescent Supply

Current (Note 2)

Select and V = V or GND

5.5

$ 50

$ 200

2. Guaranteed by design.

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NLAS4684

DC ELECTRICAL CHARACTERISTICS − Analog Section

Guaranteed Maximum Limit

−555C to 255C

t855C

t1255C

Min Max

Min

Max

Min

Max

Symbol

Parameter

Condition

$10%

Unit

(NC)

NC “ON” Resistance

(Note 3)

v V

2.5

3.0

5.0

0.6

0.5

0.4

0.7

0.5

0.4

0.8

0.5

= GND to V

I v 100 mA

(NO)

NO “ON” Resistance

(Note 3)

w V

2.5

3.0

5.0

2.0

0.8

2.0

0.8

2.0

1.0

0.9

= GND to V

I v 100 mA

NC_On−Resistance

Flatness (Notes 3, 5)

= 100 mA

2.5

3.0

5.0

0.15

FLAT (NC)

FLAT (NO)

COM

= 0 to V

NO_On−Resistance

Flatness (Notes 3, 5)

= 100 mA

2.5

3.0

5.0

0.35

COM

= 0 to V

On−Resistance Match

Between Channels

(Notes 3 and 4)

= 1.3 V;

= 100 mA

= 1.5 V;

2.5

3.0

5.0

0.18

0.06

0.18

0.06

0.18

0.06

COM

= 100 mA

COM

= 2.8 V;

= 100 mA

COM

NC or NO Off

Leakage Current

(Figure 13) (Note 3)

= V or V

5.5

−1

−2

−10

−20

−100 100

−200 200

NC(OFF)

or V = 1.0

= 4.5 V

NO(OFF)

COM

COM ON

= V or V

IL IH

COM(ON)

Leakage Current

(Figure 13) (Note 3)

1.0 V or 4.5 V with

floating or

1.0 V or 4.5 V with

floating

COM

= 1.0 V or 4.5 V

3. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.

4. D R − R between NC1 and NC2 or between NO1 and NO2.

ON = ON(MAX)

ON(MIN)

5. Flatness is defined as the difference between the maximum and minimum value of on−resistance as measured over the specified analog

signal ranges.

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NLAS4684

AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0 ns) (Typical characteristics are at 25°C)

Guaranteed Maximum Limit

*555C to 255C

t855C

t1255C

(V)

(V) Min Typ Max Min Max Min Max

Symbol

Parameter

Turn−On Time

Test Conditions

R = 50 WC = 35 pF

Unit

2.5

3.0

5.0

1.3

1.5

2.8

(Figures 4 and 5)

Turn−Off Time

R = 50 WC, = 35 pF

2.5

3.0

5.0

1.3

1.5

2.8

OFF

BBM

(Figures 4 and 5)

Minimum Break−Before−Make

Time (Note 6)

= 3.0

3.0

1.5

R = 300 WC

= 35 pF

(Figure 3)

Typical @ 25, V = 5.0 V

Off

NC Off Capacitance, f = 1 MHz

NO Off Capacitance, f = 1 MHz

NC On Capacitance, f = 1 MHz

NO On Capacitance, f = 1 MHz

102

104

322

330

ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)

Typical

255C

6.5

Symbol

Parameter

Condition

Unit

Maximum On−Channel −3dB

Bandwidth or Minimum Frequency

Response

= 0 dBm

3.0

MHz

centered between V and GND

(Figure 6)

3.0

9.5

Maximum Feed−through On Loss

= 0 dBm @ 100 kHz to 50 MHz

ONL

centered between V and GND (Figure 6)

−0.05

Off−Channel Isolation (Note 7)

f = 100 kHz; V = 1 V RMS; C = 5 nF

ISO

centered between V and GND(Figure 6)

3.0

−65

Charge Injection Select Input to

Common I/O (Figures 10 and 11)

GND, R = 0 W, C = 1 nF

IN = CC to

Q = C − D V

(Figure 7)

OUT

THD

VCT

Total Harmonic Distortion THD +

Noise (Figure 9)

= 20 Hz to 100 kHz, R = R

= 600 W, C = 50 pF

3.0

0.14

−83

gen

= 1 V RMS

Channel−to−Channel Crosstalk

f = 100 kHz; V = 1 V RMS, C = 5 pF, R = 50

centered between V and GND (Figure 6)

6. −55°C specifications are guaranteed by design.

7. Off−Channel Isolation = 20log10 (Vcom/Vno) (See Figure 6).

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NLAS4684

DUT

Input

Output

GND

OUT

0.1 m F

BMM

35 pF

90%

90% of V

Output

Switch Select Pin

GND

Figure 3. t_BBM(Time Break−Before−Make)

Input

50%

90%

DUT

0 V

Output

OUT

0.1 m F

Open

90%

35 pF

Output

Input

OFF

Figure 4. t_ON/t_OFF

Input

50%

DUT

0 V

Output

OUT

Open

35 pF

Output

10%

Input

OFF

Figure 5. t_ON/t_OFF

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NLAS4684

DUT

Reference

Input

50 W Generator

Transmitted

Output

Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is

the bandwidth of an On switch. V , Bandwidth and V are independent of the input signal direction.

ISO

ONL

OUT

_{= Off Channel Isolation = 20 Log}ǒ Ǔ _{for V}

at 100 kHz

ISO

OUT

_{= On Channel Loss = 20 Log}ǒ Ǔ _{for V}

at 100 kHz to 50 MHz

ONL

Bandwidth (BW) = the frequency 3 dB below V

= Use V setup and test to all other switch analog input/outputs terminated with 50

ONL

ISO

Figure 6. Off Channel Isolation/On Channel Loss (BW)/Crosstalk

(On Channel to Off Channel)/V_ONL

DUT

Output

Open

GND

Output

Off

OUT

Off

Figure 7. Charge Injection: (Q)

NC1

0.1

NO1

0.01

100

1000

10000

100000

FREQUENCY (Hz)

Figure 8. Total Harmonic Distortion Plus Noise Versus Frequency

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NLAS4684

1.6

1.4

1.2

200

NO, V = 5 V

−200

−400

−600

−800

Threshold Rising

Threshold Falling

NC, V = 5 V

0.8

0.6

0.4

0.2

(V)

V (V)

Figure 9. Voltage in Threshold on Logic Pins

Figure 10. Charge Injection versus V_is

100

T−on 2.5 V

T−on

T−off 2.5 V

T−on 3.0 V

T−off 3.0 V T−on 5.0 V

T−off 5.0 V

T−off

−55

−30

−5

120

1.8

2.8

3.8

4.8

TEMPERATURE (°C)

Figure 11. T−on / T−off Time versus

Temperature

Figure 12. T−on / T−off Time versus Temperature

1000

100

Comm / Closed Switch

0.1

0.01

Open Switch

0.01

0.001

−55

−5

−55

−5

TEMPERATURE (°C)

Figure 13. NO/NC Current Leakage Off and On,

_CC= 5 V

Figure 14. I_CCCurrent Leakage versus

Temperature V_CC= 5.5 V

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NLAS4684

2.5

4.5

1.8 V

T = +25°C

1.8 V

2.0 V

= 100 mA

COM

= 100 mA

COM

3.5

2.0 V

2.5

2.5 V

2.7 V

1.5

2.3 V

2.5 V

2.3 V

2.7 V

1.5

3.0 V

5.0 V

4.0

5.0 V

0.5

3.0 V

0.5

0.0

1.0

2.0

3.0

(V)

5.0

0.0

1.0

2.0

3.0

(V)

4.0

5.0

COM

Figure 15. NC On−Resistance versus

COM Voltage

Figure 16. NO On−Resistance versus

COM Voltage

1.3

1.1

0.9

0.7

0.5

0.3

0.1

0.45

0.4

= 2.5 V

+85°C

= 100 mA

COM

+85°C

+25°C

0.35

0.3

+25°C

0.25

0.2

−40°C

0.15

0.1

0.0

0.5

1.0

1.5

2.0

2.5

0.0

1.0

2.0

3.0

4.0

5.0

(V)

COM

Figure 17. NC On−Resistance versus

COM Voltage

Figure 18. NO On−Resistance versus

COM Voltage

0.35

0.3

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

+25°C

+85°C

+25°C

−40°C

0.25

0.2

−40°C

0.15

0.1

= 3 V

= 100 mA

= 3 V

= 100 mA

COM

0.0

1.0

2.0

3.0

0.0

1.0

2.0

3.0

COM

(V)

COM

Figure 19. NC On−Resistance versus

COM Voltage

Figure 20. NC On−Resistance versus

COM Voltage

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NLAS4684

0.26

0.24

0.22

0.2

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

+85°C

−40°C

+25°C

−40°C

0.18

0.16

0.14

0.12

0.1

+85°C

= 5 V

= 100 mA

COM

0.0

1.0

2.0

3.0

4.0

5.0

0.0

1.0

2.0

3.0

4.0

5.0

COM

(V)

COM

(V)

Figure 21. NC On−Resistance versus

COM Voltage

Figure 22. NO On−Resistance versus

COM Voltage

Bandwidth (On − Loss)

−1

Phase Shift

(Degrees)

Phase Shift

(Degrees)

−10

= 3.0 V

T = 25°C

−10

0.001

0.01

0.1

1.0

100

0.001

0.01

0.1

1.0

100

FREQUENCY (MHz)

Figure 23. NC Bandwidth and Phase Shift

versus Frequency

Figure 24. NO Bandwidth and Phase Shift

versus Frequency

−10

NC Off−Isolation

NO Off−Isolation

Crosstalk

= 3.0 V

T = 25°C

−100

0.001

−100

0.001

0.01

0.1

1.0

100

0.01

0.1

1.0

100

FREQUENCY (MHz)

Figure 25. NC Off Isolation and Crosstalk

Figure 26. NO Off Isolation and Crosstalk

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NLAS4684

ORDERING INFORMATION

Device

Package

Shipping†

NLAS4684FCT1

Microbump−10

3000 / Tape & Reel

NLAS4684FCT1G

Microbump−10

(Pb−Free)

NLAS4684MNR2

QFN−10

2500 / Tape & Reel

NLAS4684MNR2G

QFN−10

(Pb−Free)

NLAS4684MR2

Micro10

4000 / Tape & Reel

NLAS4684MR2G

Micro10

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

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NLAS4684

PACKAGE DIMENSIONS

Microbump−10

CASE 489AA−01

ISSUE A

NOTES:

1. DIMENSIONING AND TOLERANCING

PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION:

MILLIMETERS.

3. COPLANARITY APPLIES TO SPHERICAL

CROWNS OF SOLDER BALLS.

4 X

0.10

MILLIMETERS

DIM MIN

MAX

−−− 0.650

PIN ONE

CORNER

A1 0.210 0.270

A2 0.280 0.380

1.965 BSC

1.465 BSC

0.250 0.350

0.500 BSC

1.500 BSC

1.000 BSC

0.10

0.075 C

SEATING

PLANE

10 X

0.15

0.05

A B

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NLAS4684

PACKAGE DIMENSIONS

QFN−10 (DUAL SIDED)

CASE 485C−01

ISSUE O

−X−

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION D APPLIES TO PLATED TERMINAL

AND IS MEASURED BETWEEN 0.25 AND 0.30 MM

FROM TERMINAL.

−Y−

4. COPLANARITY APPLIES TO THE EXPOSED PAD

AS WELL AS THE TERMINALS.

2 PL

MILLIMETERS

DIM MIN MAX

3.00 BSC

0.80

INCHES

MIN MAX

0.25 (0.010) T

2 PL

0.118 BSC

1.00 0.031

0.039

0.012

0.100

0.073

0.20

2.45

1.75

0.30 0.008

2.55 0.096

1.85 0.069

0.25 (0.010) T

0.50 BSC

0.020 BSC

1.23

1.28 0.048

0.050

0.20 REF

0.008 REF

0.00

0.35

0.05 0.000

0.45 0.014

0.002

0.018

SEATING

PLANE

−T−

1.50 BSC

0.88 0.93 0.035

0.60 0.80 0.024

0.059 BSC

0.037

0.031

10 PL D NOTE 3

0.10 (0.004)

T X Y

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NLAS4684

PACKAGE DIMENSIONS

Micro10

CASE 846B−03

ISSUE C

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION “A” DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE

BURRS SHALL NOT EXCEED 0.15 (0.006)

PER SIDE.

−A−

4. DIMENSION “B” DOES NOT INCLUDE

INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION

SHALL NOT EXCEED 0.25 (0.010) PER SIDE.

5. 846B−01 OBSOLETE. NEW STANDARD

846B−02

−B−

MILLIMETERS

INCHES

PIN 1 ID

D 8 PL

DIM MIN

MAX

3.10

MIN

MAX

0.122

0.043

0.012

0.08 (0.003)

2.90

0.95

0.20

0.114

1.10 0.037

0.30 0.008

0.50 BSC

0.020 BSC

0.05

0.10

4.75

0.40

0.15 0.002

0.21 0.004

5.05 0.187

0.70 0.016

0.006

0.008

0.199

0.028

0.038 (0.0015)

−T−

SEATING

PLANE

ON Semiconductor and

are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

LITERATURE FULFILLMENT:

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

ON Semiconductor Website: http://onsemi.com

Order Literature: http://www.onsemi.com/litorder

Literature Distribution Center for ON Semiconductor

P.O. Box 61312, Phoenix, Arizona 85082−1312 USA

Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada

Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

Japan: ON Semiconductor, Japan Customer Focus Center

2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051

Phone: 81−3−5773−3850

For additional information, please contact your

local Sales Representative.

NLAS4684/D

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NLAS4684MNR2产品参数

型号:	NLAS4684MNR2
Brand Name：	ON Semiconductor
是否无铅：	含铅
生命周期：	Obsolete
零件包装代码：	QFN
包装说明：	3 X 3 MM, 0.5 MM PITCH, QFN-10
针数：	10
制造商包装代码：	485C
Reach Compliance Code：	not_compliant
HTS代码：	8542.39.00.01
风险等级：	7.25
模拟集成电路 - 其他类型：	SPDT
JESD-30 代码：	S-XDSO-N10
JESD-609代码：	e0
长度：	3 mm
信道数量：	1
功能数量：	2
端子数量：	10
标称断态隔离度：	65 dB
通态电阻匹配规范：	0.06 Ω
最大通态电阻 (Ron)：	1 Ω
最高工作温度：	125 °C
最低工作温度：	-55 °C
输出：	SEPARATE OUTPUT
封装主体材料：	UNSPECIFIED
封装代码：	HVSON
封装等效代码：	SOLCC10,.11,20
封装形状：	SQUARE
封装形式：	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	240
电源：	2/5 V
认证状态：	Not Qualified
座面最大高度：	1 mm
子类别：	Multiplexer or Switches
最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	1.8 V
标称供电电压 (Vsup)：	3 V
表面贴装：	YES
最长断开时间：	50 ns
最长接通时间：	60 ns
切换：	BREAK-BEFORE-MAKE
技术：	CMOS
温度等级：	MILITARY
端子面层：	Tin/Lead (Sn90Pb10)
端子形式：	NO LEAD
端子节距：	0.5 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	30
宽度：	3 mm
Base Number Matches：	1

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